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Columbia Computer Science Faculty Candidate Colloquium Temporal Memory Streaming Thomas Wenisch, CMU Mon, Feb. 26, 11 AM, 414 CEPSR.
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Columbia Computer ScienceFaculty Candidate ColloquiumTemporal Memory StreamingThomas Wenisch, CMUMon, Feb. 26, 11 AM, 414 CEPSR While semiconductor scaling has steadily improved processor performance, scaling trends in memory technology have favored improving density over access latency. Because of this processor/memory performance gap -- often called the memory wall -- modern server processors spend over half of execution time stalled on long-latency memory accesses. To improve average memory response time for existing software, architects must design mechanisms that issue memory requests earlier and with greater parallelism. Commercial server applications present a particular challenge for memory system design because their large footprints, complex access patterns, and frequent chains of dependent misses are not amenable to existing approaches for hiding memory latency. Despite their complexity, these applications nonetheless execute repetitive code sequences, which give rise to recurring access sequences -- a phenomenon I call temporal correlation. In this talk, I present Temporal Memory Streaming, a memory system design paradigm where hardware mechanisms observe repetitive access sequences at runtime and use recorded sequences to stream data from memory in parallel and in advance of explicit requests.