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Minimum Complexity Non-blocking Switching. Yoram Ofek Università di Trento. Achille Pattavina Politecnico di Milano. Mario Baldi Politecnico di Torino mario.baldi@polito.it staff.polito.it/mario.baldi. Time-Driven Switching. Low routing complexity No-header processing
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Minimum Complexity Non-blocking Switching Yoram OfekUniversità di Trento Achille PattavinaPolitecnico di Milano Mario Baldi Politecnico di Torino mario.baldi@polito.it staff.polito.it/mario.baldi
Time-Driven Switching • Low routing complexity • No-header processing • Low buffer requirement • Low switching complexity • Architecture and control • Aligned switching • Pre-computed switching fabric configuration • Fabric • Banyan
A Potential Problem Scheduling resulting in blocking
time cycle As connections/flows are set up time frames are reserved on each link. Reservation vectors Scheduling As more connections/flows are setup …
Since nodes forward packets during the time frame following their reception … … the time frames on a link follow the ones on the upstream link. … more time frames are reserved As more connections/flows are setup on different paths…
Still, when setting up a newconnection/flow... … multiple possible schedules may exist.
However, scheduling may be impossible. … even though enough capacity is available on all the links. Not possible Not possible Blocking Not possible
1000 TFs 64 TFs 32 TFs 16 TFs 1 TF Simulation Results
Turning the Potential Problem into a Major Advantage Banyan switching fabric N a { Minimum complexity: a•N•lgaN
Blocking 1 1 2 2 3 3 4 4 But only within the same time frame
The Intuition Conflicts are minimized across multiple time frames
Lia’s Theorem v v: number of vertical replications that ensure the switch to be non-blocking
Selecting one out of k TFs in a time-driven switch is equivalent to selecting one out of k vertically replicated switching fabrics Time-space equivalence A time-driven switch with a single Banyan fabric is non-blocking up to a load (k-v)/k
Ongoing Work • Formal Proof • Basic time-space equivalence theorem • Effect of speed-up • Simulation • Validation of analysis • Behavior at higher loads • Network of switches • Analysis • Simulation