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The MIPS 32. Project 1 Discussion? HW 2 Discussion? We want to get some feel for programming in an assembly language - MIPS 32 We want to fully understand the context frames and switching We want to discuss arithmetic - multiplication and division instructions
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The MIPS 32 • Project 1 Discussion? • HW 2 Discussion? • We want to get some feel for programming in an assembly language - MIPS 32 We want to fully understand the context frames and switching • We want to discuss arithmetic - multiplication and division instructions Note: Anyone want to work in the lab (for $ )?
Switch Debouncing • An excellent switch debounce circuit: - inputs S, R, D, & C are always a “0” or a “1” 1K – 5 K Up = 1, Down = 0 Up = 0, Down = 1 1K – 5 K
An Asside • What is a MIPS 32 pseudoinstruction ? - an instruction that is not a “real” MIPS 32 instruction but is assembled into a “real” machine language instruction. - example: move rd, sr assembles like add rd, sr, $0
Procedure Call “Convention” Minus 4 Before calling a routine, the caller must: What Registers MUST the callee routine save? What Registers MUST the caller routine save? What should be the size of the frame?
Main Routine Callee Duties Caller duties Print results Callee Duties
Called Routine Callee duties Routine algorithm Caller duties Callee duties
Arithmetic Operations • Add & Subtract – Can they be done in one cycle? - How can add/sub speed be improved? - How does MIPS handle overflow? • Multiplication & Division – How long do they take? - How can mult/div speed be improved? - What are Registers LO and Hi ?
can be formed in parallel and added in parallel for faster multiplication Multiply • Binary multiplication is just a bunch of right shifts and adds n multiplicand multiplier partial product array n double precision product 2n
Multiplication Shift & Add simultaneously:
Multiplication Multiple Adders:
Division • Division is just a bunch of quotient digit guesses and left shifts and subtracts n n quotient 0 0 0 dividend divisor 0 partial remainder array 0 0 remainder n
Division Shift & Add simultaneously:
IEEE 754 FP Standard Encoding • Most (all?) computers these days conform to the IEEE 754 floating point standard (-1)sign x (1+F) x 2E-bias • Formats for both single and double precision • F is stored in normalized form where the msb in the fraction is 1 (so there is no need to store it!) – called the hidden bit • To simplify sorting FP numbers, E comes before F in the word and E is represented in excess (biased) notation
Floating Point Addition • Addition (and subtraction) (F1 2E1) + (F2 2E2) = F3 2E3 • Step 1: Restore the hidden bit in F1 and in F2 • Step 1: Align fractions by right shifting F2 by E1 - E2 positions (assuming E1 E2) keeping track of (three of) the bits shifted out in a round bit, a guard bit, and a sticky bit • Step 2: Add the resulting F2 to F1 to form F3 • Step 3: Normalize F3 (so it is in the form 1.XXXXX …) • If F1 and F2 have the same sign F3 [1,4) 1 bit right shift F3 and increment E3 ? • If F1 and F2 have different signs F3 may require many left shifts each time decrementing E3 ? • Step 4: Round F3 and possibly normalize F3 again • Step 5: Rehide the most significant bit of F3 before storing the result
Reflecting What resources/knowledge is needed to program in a new Machine/Assembly Language ? • ? • ? • ? • ?