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Lecture 0. Course Introduction

COMP212 Computer Architecture. Lecture 0. Course Introduction. Prof. Taeweon Suh Computer Science Education Korea University. Course Information. Instructor Prof. Taeweon Suh Textbook

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Lecture 0. Course Introduction

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  1. COMP212 Computer Architecture Lecture 0. Course Introduction Prof. Taeweon Suh Computer Science Education Korea University

  2. Course Information • Instructor • Prof. TaeweonSuh • Textbook • Computer Organization and Design by David Patterson and John Hennessy, 4th Ed., Morgan Kaufmann, 2009 (Required, No Korean-translated version) • Reference • Digital Design and Computer Architecture by David Money Harris and Sarah L. Harris, Morgan Kaufmann, 2007 • Prerequisites • COMP211 Computer Logic Design • COMP169 C Programming • Office hours • After class as needed • By appointment at Lyceum 307 • Class web • http://esca.korea.ac.kr • Contact Information • suhtw@korea.ac.kr • 02-3290-2397

  3. TA & MA • Teaching Assistant: 김한이 • Computer Systems Lab at Lyceum322B • Email: hanyemmy@korea.ac.kr • Tel: 02-3290-2685 (office) 010-3107-1379 (mobile) • Major Assistant: 공선희 • Email: nickong@korea.ac.kr • Tel: 010-9039-4537

  4. Your FAQ Computer Ads in 2008

  5. Your FAQ 45nm Computer Ads in 2010

  6. Your FAQ Computer Ads in 2013

  7. Abstraction • Abstraction helps us deal with complexity • Hide lower-level detail

  8. Abstraction Analogies Driver Customer Abstraction layer Abstraction layer Machine Details Machine Details Hardware board in a vending machine Combustion Engine in a car Break system in a car

  9. Abstractions in Computer Programming using APIs Provides APIs (Application Programming Interface) Operating Systems Assembly language or Machine language Instruction Set Architecture (ISA) Hardware Implementation (x86)

  10. Abstractions in Smartphones Application Programming using APIs Operating Systems Instruction Set Architecture (ISA) Hardware Implementation (ARM) http://arstechnica.com/apple/2012/09/detailed-analysis-of-apple-a6-core-reveals-layout-done-by-hand/

  11. A Computer System (~ 2010) Focus of this course CPU Main Memory FSB (Front-Side Bus) North Bridge Graphics card DMI (Direct Media I/F) Peripheral devices South Bridge Hard disk USB PCIe card But, don’t forget the big picture!

  12. Evolution of Computer Systems • Core 2 Duo – based Systems • Core i7– based Systems Main Memory (DDR3) Main Memory (DDR2) CPU CPU Quickpath (Intel) or Hypertransport (AMD) FSB (Front-Side Bus) North Bridge IOH (Input/Output Hub) South Bridge South Bridge DMI (Direct Media I/F) DMI (Direct Media I/F) Keep in mind that CPU and computer systems are evolving at a fast pace

  13. Core i7 (Ivy Bridge)-based Systems FDI: Flexible Display Interface SPI: Serial Peripheral Interface SMBus: System Management Bus

  14. Ultimate Goal Understand How Your Computer Works Really!

  15. COMP211 vs COMP212 • COMP211: Computer Logic Design • We learned digital logic • What you can do with it? • Combinational logic design • 7 segment logic, multiplexer etc • Sequential logic design • Vending machine logic • Digital clock logic • But, what you have designed does NOT provide any programmability to users • COMP212: Computer Architecture • We study and design computers, focusing on CPU (processor) • Processor provides programmability to users

  16. Hardware in Computer • Computer architecture course mainly covers how to build a CPU with the basic elements 2nd Generation Core i7 processor 995 million transistors in 216mm2 (32nm technology) (COMP212) Digital Logic (COMP211)

  17. Computer Architecture int main() { int a, b, c; a = 3; b = 9; c = a + b; return c; } • COMP211 Computer Logic Design • COMP169 C Programming • COMP166 Computer Programming • And Java, C++, C# … • COMP212 Computer Architecture course is where software meets hardware

  18. COMP212 Computer Architecture • Modern x86-based computers are very complicated; It is covered in advanced computer architecture course in graduate school • Our goal is to learn and understand the basic operation and mechanism of computers, so we focus on • Commercially successful yet simple CPU (32-bit MIPS) (http://www.mips.com/products/cores/) • Memory hierarchy (cache, main memory, and hard-disk)

  19. Objectives • Understand how computer works • Learn machine language (assembly language) • MIPS instructions • How the code in high-level language is translated to machine code and gets executed in CPU • Learn microarchitecture • CPU implementation • Learn memory hierarchy in computer • Register, Cache, Main memory, and Hard-disk • Design CPU with Verilog-HDL (individual class project)

  20. Grading Policy • Exams (40%) • Midterm Exam: 20% • Final exam: 20% • Quizzes: 10% • Assignments: 10% • Term Project (CPU Design): 40% (Most Important!) • Your CPU should be able to run Prof. Suh’s program on DE2 board • Fail rules • You will be given an “F” if you don’t attend classes more than 3 times • 2 late show-ups will be counted as 1 absence

  21. Warning • Don’t take this course if you don’t know • what the combinational and sequential logic is • what clock is • what latch and flip-flop are • FSM (Finite State Machine) • Verilog-HDL • Please take “COMP211 Computer Logic Design” next spring and come back!

  22. Expectations • You will have a lot of fun throughout this class • But, it could take a lot of time to finish your term project • After successfully completing this course, you will have a lot of confidence in computers and how computer works!

  23. Announcement • No class on week #5 (9/30 and 10/02) • The classes on 9/30 and 10/2 are replaced by the classes on two Thursdays (9/26 and 10/10). • The Thursday classes will start from 7pm 8pm • The lecture room will be announced later

  24. Backup Slides

  25. DE2 Board Serial Port LCD FPGA (Cyclone-II) 7 Segments LEDs Switches Push buttons

  26. More Detailed Info

  27. DE2 Board Connections

  28. Computer System for Final Project Instruction Data MIPS CPU Address Bus Address Bus EAX R15 …. ALU R1 R0 32-bit Timer 32-bit 8KB Memory (Instructions, Data) 32-bit 32-bit GPIO Data Bus Data Bus

  29. Our Computer System in FPGA MIPS CPU Address Bus Address Bus EAX R15 …. ALU R1 R0 Timer 32-bit GPIO 32-bit 8KB Memory 32-bit 32-bit Data Bus Data Bus

  30. iPhone 4 Teardown http://www.ifixit.com/Teardown/iPhone-4-Teardown/3130/1 http://news.cnet.com/8301-13924_3-20006904-64.html GSM (Global System for Mobile communications): 2G, 3G, 4G .. UMTS (Universal Mobile Telecommunications Systems): one of 3G technologies being developed into 4G

  31. iPhone 4 Teardown 512MB Mobile DDR Audio Codec (Cirrus Logic) Samsung flash memory (32GB): K9PFG08 A4 Processor (ARM Cortex A8) designed by Apple manufactured by Samsung GSM and more GSM (Global System for Mobile communications): 3G

  32. iPhone 4 Teardown • Accelerometer detects when the user has rotated the device from portrait to landscape, then automatically changes the contents of the display accordingly • Proximity sensor detects when you lift iPhone to your ear and immediately turns off the display to save power and prevent inadvertent touches until iPhone is moved away • Ambient light sensor automatically adjusts the display’s brightness to the appropriate level for the current ambient light, enhancing the user experience and saving power at the same time

  33. iPhone 5 Teardown Accelerometer Touchscreen controller • A6 application processor, based off the ARMv7 ISA • 1GB Elpida LP (Low Power) DDR2 integrated according to Chipworks LTE modem 16GB NAND Flash from Hynix Wi-Fi module 3-axis gyroscope http://www.ifixit.com/Teardown/iPhone+5+Teardown/10525/2

  34. Galaxy S4 Teardown Samsung 16GB eMMC (MultiMediCard) + 64MB NAND Flash Intel Wireless Processor Exynos 4412: Quad-core A9 with 1GB DDR2 http://www.samsung.com/ http://www.ifixit.com/Teardown/Samsung-Galaxy-S-III-Teardown/

  35. Galaxy S4 Teardown Exynos 5 Octa (Exynos 5410): quad-core Cortex-A15 and quad-core Cortex-A7 -- Wikipedia http://www.techinsights.com/inside-samsung-galaxy-s4/

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