Prototyping of code transformations related to speculation and early condition execution completed

1. SPARK U C I R V I N E CECS U C I R V I N E Spark: A Parallelizing Compiler Framework for High-Level System Synthesis Sumit Gupta, N. Savoiu, S. Kim, N.D. Dutt, R.K. Gupta, A. Nicolau Center for Embedded Computer Systems, University of California, Irvine http://www.cecs.uci.edu/~spark Generalized Code Motions • Hierarchical code motions • Ops are moved across entire conditionals • Significantly reduce schedule length Synthesis: from Behavior to CDFG to Architecture Reverse Speculation and Early Condition Execution Extracting Parallelism using Speculation Scheduling under Resource Constraints Resource Directed Loop Pipelining • Evaluate conditions ASAP • Moves low priority ops into conditionals • Only moves to branches which require result • Currently being implemented • Enables across loop iteration compaction • Can lead to significant throughput gains Effects of Code Motions on Various Metrics Operation and Variable Binding calc_forw_motion fcn from MPEG Prediction Block (61 Ops, 36 BBs) • Achieve significant reductions in longest path lengths and total delay • Minimal increase in clock cycle length • Area increase can be reduced by efficient binding Spark’s Synthesis Design Flow • Studying effects of code motion on controller complexity and clock cycle length • Use resource binding and other techniques to reduce interconnection and controller complexity • Develop Loop Pipelining heuristics to improve throughput • Implement into a user-driven toolbox of transformations Long Term Goals Status and Implementation • Prototyping of code transformations related to speculation and early condition execution completed • Accepts C input and outputs synthesizable RTL VHDL • Implemented synthesis tasks: scheduling, controller generation • Currently implementing operation and variable binding • Benchmarked on large real-life applications: MPEG, ADPCM Supported by Semiconductor Research Corporation