Application of General Purpose HPC Systems in HPEC

1. Application of General Purpose HPC Systems in HPEC David Alexander Director of Engineering SGI, Inc.

2. SGI HPC System Architecture

3. SGI Scalable ccNUMA ArchitectureBasic Node Structure and Interconnect C A C H E C A C H E C A C H E C A C H E CPU CPU CPU CPU Interface Chip Interface Chip Physical Memory (2-16GB) Physical Memory (2-16GB) Processor Interface (>6GB/sec) Processor Interface (>6GB/sec) NUMAlink Interconnect (>6GB/sec) Memory Interface (>8GB/sec) Memory Interface (>8GB/sec) Physical Memory

4. SGI Scalable ccNUMA ArchitectureScaling to Large Node Counts CPU CPU CPU CPU CPU CPU CPU CPU Interface Chip Interface Chip Interface Chip Interface Chip Memory Memory Memory Memory • System Interconnect Fabric • Scaling to 100’s of processors • RT Memory Latency < 600ns worst case (64p config) • Bi-section bandwidth >25GB/sec (64p config)

5. SGI Scalable ccNUMA ArchitectureSGI® NUMAflex™Modular Design Performance: High-bandwidth interconnect with very low latency Flexibility: Tailored configurations for different dimensions of scalability Investment protection: Add new technologies as they evolve Scalability: No central bus or switch; just modules and NUMAlink™ cables System Interconnect CPU & Memory System I/O Standard I/O Expansion High BW I/O Expansion Graphics Expansion Storage Expansion Modules from SGI® Onyx® 3000 Series

6. SGI Scalable ccNUMA ArchitectureThe Benefits of Shared Memory Commodity interconnect mem mem mem mem mem mem ... node +OS node +OS node +OS node +OS node +OS node +OS Traditional Clusters SGI® Altix™ 3000 Fast NUMAflex™ interconnect Global shared memory node+ OS node+ OS node+ OS node+ OS ... • What is shared memory? • All nodes operate on one large shared memory space, instead of each node having its own small memory space • Shared memory is high-performance • All nodes can access one large memory space efficiently, so complex communication and data passing between nodes aren’t needed • Big data sets fit entirely in memory; less disk I/O is needed • Shared memory is cost-effective and easy to deploy • The SGI Altix 3000 family supports all major parallel programming models • It requires less memory per node, because large problems can be solved in big shared memory • Simpler programming means lower tuning and maintenance costs

7. SGI® Altix™ 3000 HPC Product

8. SGI® Altix™ 3000 Overview First Linux® node with 64 CPUs in single-OS image First clusters with global shared memory across multiple nodes First Linux solution with HPC system- and data-management tools World-record performance for floating-point calculations, memory performance, I/O bandwidth, and real technical applications

9. SGI® supercomputing technology, Intel’s most advanced processors, and open-source computing SGI® Altix™ 3000 Fusion of Powerhouse Technologies Global shared memory (64-bit shared memory across cluster nodes) SGI ProPack™ and supercomputing enhancements SGI® NUMAlink™ (Built-in high-bandwidth, low-latency interconnect) SGI® NUMAflex™ (Third-generation modular supercomputing architecture) Intel® Itanium® 2 processor family Industry-standard Linux®

10. Single-node entry offering 4–12 1.30 GHz Itanium® 2 processors, 3MB L3 cache Up to 96GB memory SGI® Altix™ 3000 Family Extreme Power, Extreme Potential Model 3700 Superclusters • Scalable performance offering • 4–64 Itanium 2 processors in a single node • 1.30 GHz/3MB L3 cache • 1.50 GHz/6MB L3 cache • Shared memory across nodes • Scalable to 2,048 processors, 16TB memory • Nodes up to 64P, 4TB memory Model 3300 Servers

11. Multi-Paradigm Architecture

12. Multi-Paradigm ArchitectureOverview IO IO C MSE MSE C C R R C C C V C R R C C MSE C MSE C IO IO • NUMAlink system interconnect • General-purpose compute nodes • Peer-attached general purpose I/O • Mission-specific accel. and/or I/O (MSE) • Integrated graphics/visualization R C IO MSE V

13. Multi-Paradigm ArchitectureMission Specific Element (MSE) System Interconnect Fabric MSE Memory TIO ASIC FPGA, DSP, or ASIC >5GB/s I/O NL4 Ports (>5GB/s x 2) • Implementation variants: • Customer supplied/loaded FPGA algorithms and/or ASIC/DSP • Subroutine or standard library acceleration • Specific use “appliance”

14. Embedded High Performance Computing (EHPC)

15. Embedded High Performance ComputingUnified Development/Deployment Environment Scalable ccNUMA System Architecture SGI EHPC System Seamless HPC Application Development Model Embedded Systems Packaging Mission-Specific Processing EHPC Today Different Development and Deployment Environments EHPC Vision Unified Development and Deployment Enhanced software development productivity Superior performance and HW utilization Demonstration to deployment in days Benefits from mainstream HPC advances Development Environment HPC methods, tools, hardware Architecture provides freedom to develop new approaches Platform Port Months of work Millions of dollars Significant schedule risk Significant architectural/performance risk Deployment Proprietary hardware and software “Islands of memory” narrows algorithm options

16. Embedded High Performance ComputingEHPC Platform Scalable ccNUMA System Architecture SGI EHPC System Seamless HPC Application Development Model Embedded Systems Packaging Mission-Specific Processing • Unified software environment for development, prototype and deployment • Full multi-paradigm computing support • Field-upgradeable mission specific processing acceleration • Highly optimized performance per watt and performance per slot • Design to fit into established environmentals, form factors, and interfaces • 6U Eurocard form factor • Passive, slot configurable backplane • PMC module connectivity to standard interfaces • Able to address oceanic, ground and airborne environmentals

17. Embedded High Performance ComputingFamily of 6U Form Factor Modules Cache Cache PMC Module Site uP uP 6U Form Factor 6U Form Factor PIC PMC Module Site Memory DDR SDRAM NUMAlink Controller Memory DDR SDRAM NUMAlink4 Ports Memory DDR SDRAM Memory DDR SDRAM NUMAlink Controller NUMAlink4 Ports Memory DDR SDRAM Memory DDR SDRAM System Control Diagnostic & L1 Ports Memory DDR SDRAM Memory DDR SDRAM System Control Diagnostic & L1 Ports General Purpose I/O Blade Scalable General Purpose Processor/Memory Blade

18. Embedded High Performance ComputingFamily of 6U Form Factor Modules Memory Memory 6U Form Factor 6U Form Factor TIO FPGA TIO 6.4GB/s FPGA FPGA NUMAlink4 Port NUMAlink4 Port ASIC NL4 Port System Control Diagnostic & L1 Ports NL4 Port System Control Diagnostic & L1 Ports External I/O (Optional) External I/O (Optional) TIO FPGA TIO 6.4GB/s NUMAlink4 Port NUMAlink4 Port ASIC Memory Memory Mission-Specific Accelerator and/or I/O Blades

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