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Update on Strip R&D ITS upgrade - 11.10.2011. G. Contin , P. riedler , A. RiVETTi. Outline. Dummy sensor masks Sensor performance simulations Microcables development Sensor layout. Dummy sensor and chips. Dummy sensor mask submitted to FBK 2 rows of 20 mm strip per side
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Update on Strip R&DITS upgrade - 11.10.2011 G. Contin, P. riedler, A. RiVETTi
Outline Dummy sensor masks Sensor performance simulations Microcables development Sensor layout G. Contin - Strip R&D Update
Dummy sensor and chips • Dummy sensor mask submitted to FBK • 2 rows of 20 mm strip per side • 2 dummy chip included in the wafer • 128 channels • nominal size: 5900 um X 6250 um • input pad pitch: 42.5 um • 256 channels • nominal size: 11850 um X 6250 um • input pad pitch: 44.5 um • production expected for end 2011 • 15 sensors • 400 chips w/ 128 ch. • 350 chips w/ 256 ch. • microcables bonding test draft G. Contin - Strip R&D Update
Good and ghost points - present configuration MiljenkoŠuljić, Stefano. Giacomo • Simulation: • present layout • 500 MeV/c pions • normal to the sensor • realistic signal-to-noise ratio • 2D points with only geometric considerations G. Contin - Strip R&D Update
Good and ghost points - new configuration MiljenkoŠuljić, Stefano. Giacomo • Simulation: • half-length strip layout • 500 MeV/c pions • normal to the sensor • realistic signal-to-noise ratio • 2D points with only geometric considerations G. Contin - Strip R&D Update
MiljenkoŠuljić, Stefano. Giacomo G. Contin - Strip R&D Update
SSD micro-cables • Specifications: • Kapton-Aluminum • Thickness: 10 mm + 14 mm • Pitch: 44 mm (chip) / 47.5 mm (sensor) • Length: ~ 25 mm / ~ 50 mm • Assembly and folding • TAB bonding technique • Bonding windows facing sensor/chip • different hybrid layouts for P/N side G. Contin - Strip R&D Update
Microcable specifications SE SRTIIE - Karkhov • Chipcable developed for assembling to ALICE 128 dummy chips • Material: an aluminum-polyimide adhesive-less foiled dielectric FDI-A20 • Thickness: Al 10um, Polyimide 10um Technological area (electrical test pads, bond test elements) Chipcable layout Work area Work area G. Contin - Strip R&D Update
Microcableprototypes SE SRTIIE - Karkhov • Prototypes dimension adapted to TAB-70 frames: • Allows automatic test of cables and tabbed chips (cable-to-chip assembly) • 2 cables per sample First manufactured chipcables in TAB-70 frame Work area Automatic test equipment Work area for chipcables and tabbed dummy chips testing Contact device based on YAMAICHI socket for TAB-70 frames • Shorter transmitting area wrt design to fit the TAB-70 frame • Cable width corresponds to the ALICE 128 dummy chip width G. Contin - Strip R&D Update
In the pipeline… • New simulations • Point reconstruction with p-n charge matching • Spatial resolution as a function of the stereo angle • Manufacturing of microcables with different layouts • Bonding / assembly test of chip-cables-sensor • Complete module design • Hybrid layout • Cooling pipes placement • Space for support holders in cables/hybrids • Cable folding on sensor G. Contin - Strip R&D Update
BACKUP G. Contin - Strip R&D Update
ASIC development • Investigating for available solutions for strip ASIC front-end chip: contacts with UK and CERN Groups • Specification definition in progress: G. Contin - Strip R&D Update
ASIC specifications G. Contin - Strip R&D Update