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Skup instrukcija mikropocesora MIPS

Skup instrukcija mikropocesora MIPS. MIPS register convention. Register 1, called $at, is reserved for the assembler, and registers 26-27, called $k0-$k1, are reserved for the operationg system. MIPS operands. Main MIPS assembly language instruction set.

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Skup instrukcija mikropocesora MIPS

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  1. Skup instrukcija mikropocesora MIPS

  2. MIPS register convention Register 1, called $at, is reserved for the assembler, and registers 26-27, called $k0-$k1, are reserved for the operationg system.

  3. MIPS operands

  4. Main MIPS assembly language instruction set

  5. Main MIPS assembly language instruction set– cont.

  6. Main MIPS assembly language instruction set– cont.

  7. MIPS machine Language

  8. MIPS machine Language – cont.

  9. MIPS Instruction formats Main MIPS machine language, Formats and examples are shown, with values in each field: op and funct fields form the opcode (each 6 bits), rs field gives a source register (5 bits), rt is also normally a source register (5 bits), rd is the destination register (5 bits), and shamt supplies the shift amount (5 bits). The field values are all in decimal. Floating-point machine language instructions are shown in Figure 4.47 on page 291. Appendix A gives the full MIPS machine language.

  10. MIPS floating-point operands

  11. MIPS floating-point assembly language

  12. MIPS floating-point machine language

  13. Arithmetic and Logical Instructions • Absolute value • abs rdest,rsrcpseudoinstruction • Put the absolute value of register rsrc in register rdest. • Addition (with overflow) • add rd,rs,rt • 6 5 5 5 5 6 • Addition (without overflow) • addu rd,rs,rt • 6 5 5 5 5 6 • Put the sum of registers rs and rt into register rd.

  14. Arithmetic and Logical Instructions – con. • Addition immediate (without overflow) • addi rt,rs,imm • 6 5 5 16 • Addition immediate (without overflow) • addi rt,rs,imm • 6 5 5 16 • Put the sum of registers rs and sign-extended immediate into register rt.

  15. Arithmetic and Logical Instructions – con. • AND • and rd,rs,rt • 6 5 5 5 5 6 • Put the logical AND of registers rs and rt into register rd. • Andimmediate • andi rd,rs,imm • 6 5 5 16 • Put the logical AND of register rs and the zero-extended immediate into register rt.

  16. Arithmetic and Logical Instructions – con. • Divide (with overflow) • div rs,rt • 6 55 106 Divide register rs by register rt. Leave the quotient in register lo and the remainder in register hi. • Divide (without overflow) • divu rs,rt • 6 55 106 • Divide (with overflow) • div rdest,rsrc1,src2pseudoinstruction • Divide (without overflow) • div rdest,rsrc1,src2pseudoinstruction • Put the quotient of register rsrc1 and src2 into register rdest.

  17. Arithmetic and Logical Instructions – con. • Multiply • mult rs,rt • 6 55 106 Multiply register rs and rt. Leave the low-order word of the product in register lo and the high-order word in register hi. • Unsigned multiply • multu rs,rt • 6 55 106 • Multiply (without overflow) • mul rdest,rsrc1,src2pseudoinstruction • Multiply (with overflow) • mulo rdest,rsrc1,src2pseudoinstruction • Unsigned multiply (with overflow) • mulourdest,rsrc1,src2pseudoinstruction • Put the product of register rsrc1 and src2 into register rdest.

  18. Arithmetic and Logical Instructions – con. • Negate value (with overflow) • neg rdest,rsrcpseudoinstruction • Negate value (without overflow) • negu rdest,rsrcpseudoinstruction • Put the negative of register rsrc into register rdst. • NOR • nor rd,rs,rt • 6 5 5 5 5 6 • Put the logical NOR of registers rs and rt into register rd. • NOT • not rdest,rsrcpseudoinstruction • Put the sum of registers rs and rt into register rd.

  19. Arithmetic and Logical Instructions – con. • OR • or rd,rs,rt • 6 5 5 5 5 6 • Put the logical OR of registers rs and rt into register rd. • ORimmediate • ori rt,rs,imm • 6 5 5 16 • Put the logical OR of register rs and the zero-extended immediate into register rt. • Remainder • rem rdest,rsrc1,rsrc2pseudoinstruction • Unsigned remainder • remu rdest,rsrc1,rsrc2pseudoinstruction • Put the remainder od register rsrc1 divided by register rsrc2 into register rdest. Note that if an operand is negative, the remainder is unspecified by the MIPS architecture and depends on the convention of the machine on which SPIM is run.

  20. Arithmetic and Logical Instructions – con. • Shift left logical • sll rd,rt,shamt • 65 5 5 56 • Shift left logical variable • sllv rd,rt,rs • 65 5 5 56 • Shift right arithmetic • sra rd,rt,shamt • 65 5 5 56 • Shift right arithmeticvariable • srav rd,rt,rs • 65 5 5 56

  21. Arithmetic and Logical Instructions – con. • Shift right logical • sra rd,rt,shamt • 65 5 5 56 • Shift right logical variable • srlv rd,rt,rs • 65 5 5 56 • Shift register rt left (right) by the distance indicated by immediate shamt or the register rs and put the result in register rd. • Rotate left • rol rdest,rsrc1,rsrc2pseudoinstruction • Rotate right • ror rdest,rsrc1,rsrc2pseudoinstruction • Rotate register rsrc1 left(right) by the distance indicated by rsrc2 and put the result in register rdest.

  22. Arithmetic and Logical Instructions – con. • Subtract (with overflow) • subrd,rs,rt • 65 5 5 56 • Subtract(without overflow) • suburd,rs,rt • 65 5 5 56 • Put the difference of register rs and rt into register rd. • Exclusive OR • xorrd,rs,rt • 65 5 5 56 • Put the logical XOR of registers rs and the zero-extended immediate into register rt. • XORimmediate • xori rt,rs,imm • 6 5 5 16 • Put the logical XOR of register rs and the zero-extended immediate into register rt.

  23. Constant-Manipulating Instructions • Load upperimmediate • lui rt,imm • 6 5 5 16 • Load the lower halfword of the immediate imm into the upper halfword of registers rt. The lower bits of the register are set to 0. • Load immediate • li rdest,immpseudoinstruction • Move the immediate imm into register rdest.

  24. Comparison Instructions • Set less than • sltrd,rs,rt • 65 5 5 56 • Set less than unsigned • slturd,rs,rt • 65 5 5 56 • Set register rd to 1 if register rs is less than rt, and to 0 otherwise. • Set less than immediate • sltird,rs,imm • 6 5 5 16 • Set less than unsignedimmediate • sltiu rd,rs,imm • 6 5 5 16 • Set register rd to 1 if register rs is less than the sign-extended immediate, and to 0 otherwise.

  25. Comparison Instructions – cont. • Set equal • seq rdest,rsrc1,rsrc2pseudoinstruction • Set register rdest to 1 if register rsrc1 equals rsrc2, and to 0 otherwise. • Set greater than equal • sge rdest,rsrc1,rsrc2pseudoinstruction • Set greater than equal unsigned • sgeu rdest,rsrc1,rsrc2pseudoinstruction • Set register rdest to 1 if register rsrc1 is greater than or equal to rsrc2, and to 0 otherwise. • Set greater than • sgt rdest,rsrc1,rsrc2pseudoinstruction

  26. Comparison Instructions – cont. • Set greater than unsigned • sgtu rdest,rsrc1,rsrc2pseudoinstruction • Set register rdest to 1 if register rsrc1 is greater than rsrc2, and to 0 otherwise. • Set less than equal • sle rdest,rsrc1,rsrc2pseudoinstruction • Set less than equal unsigned • sleu rdest,rsrc1,rsrc2pseudoinstruction • Set register rdest to 1 if register rsrc1 is less than or equal to rsrc2, and to 0 otherwise. • Set not equal • sne rdest,rsrc1,rsrc2pseudoinstruction • Set register rdest to 1 if register rsrc1 is not equal to rsrc2, and to 0 otherwise.

  27. Branch Instructions • Branch Instruction • b labelpseudoinstruction • Unconditionally branch to the instruction at the label. • Branch coprocessor z true • bczt label • 6 5 5 16 • Branch coprocessor z false • bczf label • 6 5 5 16 • Conditionally branch the number of instructions specified by the offset if z's condition flag is true (false). z is 0, 1, 2, or 3. The floating-point unit is z = 1.

  28. Branch Instructions – cont. • Branch on equal • beqrs,rt,label • 6 5 5 16 • Conditionally branch the number of instructions specified by the offset if register rs equals rt. • Branch on greater than equal zero • bgez rs,label • 6 5 5 16 • Conditionally branch the number of instructions specified by the offset if register rs is greater than or equal to 0. • Branch on greater than equal zero and link • bgezal rs,label • 6 5 5 16 • Conditionally branch the number of instructions specified by the offset if register rs is greater than or equal to 0. Save the address of the next instruction in register 31.

  29. Branch Instructions – cont. • Branch on greater than zero • bgtz rs,label • 6 5 5 16 • Conditionally branch the number of instructions specified by the offset if register rs is greater than 0. • Branch on less than equal zero • blez rs,label • 6 5 5 16 • Conditionally branch the number of instructions specified by the offset if register rs is less than or equal to 0. • Branch on less than equal zeroand link • bltzal rs,label • 6 5 5 16 • Conditionally branch the number of instructions specified by the offset if register rs is less than 0. Save the address of the next instruction in register 31.

  30. Branch Instructions – cont. • Branch on less than zero • bltz rs,label • 6 5 5 16 • Conditionally branch the number of instructions specified by the offset if register rs is less than 0. • Branch on not equal • bners,label • 6 5 5 16 • Conditionally branch the number of instructions specified by the offset if register rs is not equal to rt. • Branch on equal zero • beqz rsrc,label pseudoinstruction • Conditionally branch to the instructions at the label if rsrc1 equals 0.

  31. Branch Instructions – cont. • Branch on greater than equal • bge rsrc1,rsrc2,label pseudoinstruction • Branch on greater than equal unsigned • bgeu rsrc1,rsrc2,label pseudoinstruction • Conditionally branch to the instruction at the label if register rsrc1 is greater than or equal to rsrc2. • Branch on greater than • bgt rsrc1,rsrc2,label pseudoinstruction • Branch on greater than unsigned • bgtu rsrc1,rsrc2,label pseudoinstruction • Conditionally branch to the instruction at the label if register rsrc1 is greater than rsrc2.

  32. Branch Instructions – cont. • Branch on less than equal • ble rsrc1,rsrc2,label pseudoinstruction • Branch on less than equal unsigned • bleu rsrc1,rsrc2,label pseudoinstruction • Conditionally branch to the instruction at the label if register rsrc1 is less than or equal to rsrc2. • Branch on less than • blt rsrc1,rsrc2,label pseudoinstruction • Branch on less than unsigned • bltu rsrc1,rsrc2,label pseudoinstruction • Conditionally branch to the instruction at the label if register rsrc1 is less than rsrc2. • Branch on not equal zero • bnez rsrc,label pseudoinstruction • Conditionally branch to the instruction at the label if register rsrc is not equal to 0.

  33. Jump Instructions • Jump • J target • 6 26 • Unconditionally jump to the instruction at target. • Jump and link • jaltarget • 6 26 • Unconditionally jump to the instruction at target. Save the address of the next instruction in register rd. • Jump and linkregister • jalr rs,rd • 65 5 5 56 • Unconditionally jump to the instruction whose address is in register rs. Save the address of the next instruction in register rd (which defaults to 31).

  34. Jump Instructions – cont. • Jump register • jr rs • 6 5 5 16 • Unconditionally jump to the instruction whose address is in register rs. • Load address • la rdest,address pseudoinstruction • Load computed address-not the contents of the location-into register rdest. • Load byte • lb rt,address • 6 5 5 16 • Load unsigned byte • lbu rt,address • 6 5 5 16 • Load the byte at address into register rt. The byte is sign-extended by lb, but not by lbu.

  35. Jump Instructions – cont. • Load halfword • lh rt,address • 6 5 5 16 • Load unsigned halfword • lhu rt,address • 6 5 5 16 • Load the 16-bit quantity (halfword) at address into register rt. The halfword is sign-extended by lh, but not by lhu. • Load word • lw rt,address • 6 5 5 16 • Load the 32-bit quantity (word) at address into register rt.

  36. Jump Instructions – cont. • Load word coprocessor • lwcz rt,address • 6 5 5 16 • Load the word at address into register rt of coprocessor z (0-3). The floating-point unit is z=1. • Load word left • lwl rt,address • 6 5 5 16 • Load word right • lwr rt,address • 6 5 5 16 • Load the left (right) bytes from the word at the possibly unaligned address into register rt.

  37. Jump Instructions – cont. • Load doubleword • ld rdest,address pseudoinstruction • Load the 64-bit quantity at address into register rdest and rdest + 1. • Unaligned load halfword • ulh rdest,address pseudoinstruction • Unsigned load halfword unaligned • ulhu rdest,address pseudoinstruction • Load the 16-bit quantity (halfword) at the possibly unaligned address into register rdest. The halfword is sign-extended by ulh, but not ulhu. • Unsigned load word • ulw rdest,address pseudoinstruction • Load the 32-bit quantity (word) at the possibly unaligned address into register rdest.

  38. Store Instructions • Store byte • sb rt,address • 6 5 5 16 • Store the low byte from register rt at address. • Store halfword • sh rt,address • 6 5 5 16 • Store the low halfword from register rt at address. • Store word • sw rt,address • 6 5 5 16 • Store the word from register rt at address. • Store word coprocessor • swcz rt,address • 6 5 5 16 • Store the word from register rt of coprocessor z at address. The floating point unit is z = 1.

  39. Store Instructions – cont. • Store word left • swl rt,address • 6 5 5 16 • Store word right • swr rt,address • 6 5 5 16 • Store the left (right) bytes from register rt at the possibly unaligned address. • Store doubleword sd rsrc,address pseudoinstruction • Store the 64-bit quantity in registers rsrc and rsrc + 1 address. • Unaligned store halfword ush rsrc,address pseudoinstruction • Store the low halfword from register rsrc at the possibly unaligned address. • Unaligned store word usw rsrc,address pseudoinstruction • Store the word from register rsrc at the possibly unaligned address.

  40. Data Movement Instructions • Move • move rdest,rsrcpseudoinstruction • Move register rsrc to rdest. • Move from hi • mfhi rd • 6 10 5 56 • Move from lo • mflo rd • 6 10 5 56 • Move the hi (lo) register to register rd. • Move to hi • mthi • 6 5 15 6

  41. Data Movement Instructions – cont. • Move to lo • mtlo • 6 5 15 6 • Move register rs to the hi (lo) register. • Move from coprocessor z • mfcz rt,rd • 6 55 5 11 • Move coprocessor z's register rd to CPU register rt. The floating-point unit is coprocessor z=1. • Move double from coprocessor z mfcl,d rdest,rsrc1 pseudoinstruction • Move floating-point registers frsrc1 and frsrc1 + 1 to CPU registers rdest and rdest + 1. • Move to coprocessor z • mtcz rt,rd • 6 55 5 11 • Move CPU register rt to coprocessor z's register rd.

  42. Floating-Point Instructions • Floating-point absolute value double • abs.d fd,fs • 655 5 56 • Floating-point absolute value single • abs.s fd,fs • 655 5 56 • Compute the absolute value of the floating-point double (single) in register fs and put it in register fd. • Floating-point addition double • add.d fd,fs,ft • 655 5 56 • Floating-point additionsingle • add.s fd,fs,ft • 655 5 56 • Compute the sum of the floating-point double (single) in register fs and ft and put it in register fd.

  43. Floating-Point Instructions – cont. • Compare equal double • c.eq.d fs,ft • 655 55 2 4 • Compare equalsingle • c.eq.s fs,ft • 655 55 2 4 • Compare the floating-point double in register fs against the one in ft and set the floating-point condition flag true if they are equal. • Compare less than equal double • c.le.d fs,ft • 655 55 2 4 • Compare less thanequalsingle • c.le.s fs,ft • 655 55 2 4 • Compute the floating-point double in register fs against the one in ft and set the floating-point condition flag true if the first is less than or equal to the second. Use the bclt or bclf instructions to test the value of this flag.

  44. Floating-Point Instructions – cont. • Compare less than double • c.lt.d fs,ft • 655 55 2 4 • Compare less thansingle • c.lt.s fs,ft • 655 55 2 4 • Compute the floating-point double in register fs against the one in ft and set the condition flag true if the first is less than the second. Use the bclt or bclf instructions to test the value of this flag. • Convert single to double • cvt.d.s fd,fs • 655 5 56 • Convert integer to double • cvt.d.s fd,fs • 655 5 56 • Convert the single precisioion floating-point number or integer in register fs to a double precision number and put it in register fd.

  45. Floating-Point Instructions – cont. • Convert double to single • cvt.s.d fd,fs • 655 5 56 • Convert integer tosingle • cvt.s.w fd,fs • 655 5 56 • Convert the double precisioion floating-point number or integer in register fs to a single precision number and put it in register fd. • Convert double to integer • cvt.w.d fd,fs • 655 5 56 • Convert single to integer • cvt.w.s fd,fs • 655 5 56 • Convert the double or single precisioion floating-point number in register fs to an integer and put it in register fd.

  46. Floating-Point Instructions – cont. • Floating-point divide double • div.d fd,fs,ft • 655 5 56 • Floating-point dividesingle • div.s fd,fs,ft • 655 5 56 • Compute the quotient of the floating-point doubles (singles) in registers fs and ft and put it in register fd. • Load floating-point double • l.d fdest,address pseudoinstruction • Load floating-pointsingle • l.s fdest,addresspseudoinstruction • Load the floating-point double (single) at address into register fdest.

  47. Floating-Point Instructions – cont. • Move floating-point double • mov.d fd,fs • 655 5 56 • Move floating-pointsingle • mov.s fd,fs • 655 5 56 • Move the floating-point double (single) from register fs to register fd. • Floating-point multiply double • mul.d fd,fs,ft • 655 5 56 • Floating-point multiplysingle • mul.s fd,fs,ft • 655 5 56 • Compute the product of the floating-point dobule (single) in registers fs and ft and put it in register fd.

  48. Floating-Point Instructions – cont. • Negate double • neg.d fd,fs • 655 5 56 • Negatesingle • neg.s fd,fs • 655 5 56 • Negate the floating-point double (single) in register fs and put it in register fd. • Store floating-point double • s.d fdest,address pseudoinstruction • Store floating-point single • s.s fdest,address pseudoinstruction • Store the floating-point double (single) in register fdest at address.

  49. Floating-Point Instructions – cont. • Floating-point subtract double • sub.d fd,fs,ft • 655 5 56 • Floating-point subtractsingle • sub.s fd,fs,ft • 655 5 56 • Compute the difference of the floating-point double (single) in registers fs and ft and put it in register fd.

  50. Floating-Point Instructions • Return from exception • rfe • 6 1 19 6 • Restore the Status register. • System call • syscall • 6 20 6 • Register $v0 contains the number of the system call. • Break • break • 6 20 6 • Cause exception code. Exception 1 is reserved for the debugger. • No operation • nop • 655 5 56 • Do nothing.

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