Device Management

Device Management • The von Neumann Architecture • System Architecture • Device Management • Polling • Interrupts • DMA

Von Neumann Architecture Born 28 December 1903, Budapest, Hungary; Died 8 February 1957, Washington DC; Brilliant mathematician, synthesizer, and promoter of the stored program concept which became the prototype of most of its successors - the von Neumann Architecture

Von Neumann Architecture Machine has a fixed set of electronic parts Actions are determined by a program stored in the computer memory. Prior to this time programming was done with switches & plugboards Instructions and Data cpu memory device device bus

The CPU and the Bus cpu Control Unit ALU General Purpose & Status Registers bus address lines data lines

cpu Control Unit ALU fetch unit instruction reg program ctr decode unit instruction execution unit address General Purpose & Status Registers

The Memory Unit Memory unit memory MAR Memory Address register MDR Memory Data register Command bus

Writing to Memory Memory unit memory Memory Address register MAR Memory Data register MDR CMD REG bus Write command Data to write Address to write to

In a Unix system, every device is treated just like a file. In fact, all devices have a file name in the file system Devices Files that represent devices are in the /dev directory $ ls –C /dev You can list the terminal device you are attached to $ tty You can copy a file to the terminal $ cp myFile.txt /dev/ttyp3

Block Devices Devices Stores data in fixed size blocks. Blocks can be read/written independently Character Devices Delivers or accepts a stream of characters.

this is usually where the file size goes. What’s up? Do an ls command on a terminal device $ ls –al /dev/ttyp3 crw - - w - - - - 1 debrytty 4, 1 Aug 4 4:18 /ttyp3 A character device

Do an ls command on a terminal device $ ls –al /dev/tty1 crw - - w - - - - 1 debrytty 4, 1 Aug 4 4:18 /dev/tty1 The i-node in this case does not contain the address of a disk block, but the address of a device driver. In this case, 4 is the “address” of the device driver, and 1 is an argument passed to the device driver. A character device

only the terminal owner can read from the terminal. crw - - w - - - - 1 debrytty 4, 1 Aug 4 4:18 /dev/tty1 A character device any other terminal user can write to the terminal

Goals of I/O Software Provide a common, abstract view of all devices to the application programmer (open, read, write) Provide as much overlap as possible between the operation of I/O devices and the CPU.

At the API, all devices support a common set of commands: open close read write ...

Note that all devices do not support all of the file system commands. For example, you cannot do a seek on a terminal.

Device Management Layers User Space User Program API open close read write ioctl Kernel Space Operating System Standard I/F Device Driver Device Driver Device Driver Device Controller Device Controller Device Controller

Layers of the I/O system and the main functions of each layer LOGICAL I/O: open, read, write, … User Process Device Independent Layer Naming, protection, blocking, allocation Driver Write to device registers, read status Device Dependent Layer Interrupt Handler Wake up driver when I/O completes Perfom the physical I/O operation data status command Device Controller

Device Controllers • I/O devices have two major components: • A mechanical component • An electronic component • The electronic component is the device controller. • It may be able to handle multiple devices • Controller's tasks • convert serial bit stream to block of bytes • perform error correction as necessary • make data available to main memory • continuously monitor the state of the device • Control the device

Put an address on the address line of the I/O bus the address selects the device put the command to be executed on the control line I/O Bus Device Controller Control and status registers Data buffer

Controller Memory CPU A Device Controller Example:Reading Data From Disk buffer read The cpu issues a read command to the disk controller

Controller Memory CPU |||||||||||| buffer The cpu issues a read command to the disk controller The disk controller reads the required data from the device and stores it in it’s internal buffer

INT Controller Memory CPU buffer The cpu issues a read command to the disk controller The disk controller reads the required data from the device and stores it in it’s buffer The controller sends an interrupt to the cpu indicating that data is ready to be read

Controller Memory CPU buffer reg a The cpu issues a read command to the disk controller The disk controller reads the required data from the device and stores it in it’s buffer The controller sends an interrupt to the cpu indicating that data is ready to be read 4. The cpu reads one byte of data from the controller buffer

Controller Memory CPU buffer a reg The cpu issues a read command to the disk controller The disk controller reads the required data from the device and stores it in it’s buffer 3. The controller sends an interrupt to the cpu indicating that data is ready to be read 4. The cpu reads one byte of data from the controller buffer The cpu writes the byte to memory. This process continues until all data is transferred

DMA Controller Controller Memory CPU Using Direct Memory Access buffer A DMA controller is like a mini-cpu. It can read And write data to memory without involving The CPU.

DMA Controller Controller Memory CPU buffer pgm read 1. The cpu programs the dma controller, giving it a beginning address in memory, a byte count,and a command to execute. It also sends a read command to the disk controller. The cpu can now go on and do other work.

DMA Controller Controller Memory CPU |||||||||| buffer The cpu programs the dma controller, giving it a beginning address in memory, a byte count, and a command to execute. It also sends a read command to the disk controller. The disk controller reads the data from the disk and stores it in its data buffer, just as it did before.

DMA Controller Controller Memory CPU buffer The cpu programs the dma controller, giving it a beginning address in memory, a byte count, and a command to execute. It also sends a read command to the disk controller. The disk controller reads the data from the disk and stores it in its data buffer, just as it did before. The DMA controller sends a command to the disk controller requesting a byte of data.

DMA Controller Controller Memory CPU buffer a The cpu programs the dma controller, giving it a beginning address in memory, a byte count, and a command to execute. It also sends a read command to the disk controller. The disk controller reads the data from the disk and stores it in its data buffer, just as it did before. The DMA controller sends a command to the disk controller requesting a byte of data. 4. The disk controller sends a byte of data to the dma controller

DMA Controller Controller Memory CPU buffer a The cpu programs the dma controller, giving it a beginning address in memory, a byte count, and a command to execute. It also sends a read command to the disk controller. The disk controller reads the data from the disk and stores it in its data buffer, just as it did before. The DMA controller sends a command to the disk controller requesting a byte of data. 4. The disk controller sends a byte of data to the dma controller 5. The dma controller writes the byte to memory.

int DMA Controller Controller Memory CPU buffer 6. All of this happens without the cpu being involved. When all of the data has been transferred, then the cpu is interrupted.

memory addresses Primary memory Traditional approach uses special I/O instructions to get at device registers Memory-Mapped I/O device 0 copy_in R3, 0x012, 4 Copy the contents of register 4 in the device at address 012 into cpu register 3 device addresses device 1 device 2

With memory mapped I/O no special instructions are needed. Device registers are mapped by the hardware into memory addresses. Primary memory Memory-Mapped I/O device 0 memory addresses Load R3, 0xFFF0124 Load register 3 from memory Address 0xFFF0124 device 1 device 2

Single Bus Architecture cpu memory device device bus All addresses and data go on the same bus

The cpu uses one bus to access memory Multiple Bus Architecture cpu memory device device bus All device addresses and data go on another bus

Application programmers expect serial execution semantics I/O – Processor Overlap read (device, “%d”, x); y = f(x); We expect that this statement will complete before the assignment is executed. To accomplish this, the OS blocks the process until the I/O operation completes.

Polling vs. Interrupts

Because there is a tremendous difference in speed between an I/O device and the computer, the computer must wait until the device is ready to process the next byte of data. Polling Status Register Instruction Register Accumulator Status lines Data lines Control lines and address lines

print instruction device address Example character to be printed Status Register Instruction Register Accumulator character print printed! Status lines Data lines Control lines and address lines

Load character into accumulator If the printer can print 100 characters a second, then it takes 10ms to print each character. Thus this polling loop runs for 10 ms between each character. Polling Clear the status register What is wrong with this approach ? Issue Write Command Is the printer done? yes Load character into accumulator no

An example of a device driver using polling User Space • Application issues a read( ) call. • The OS blocks the application. User Program Direct I/O with Polling Device Interface (API) Operating System Device Driver Kernel Space Device Controller

2. User Space BLOCKED User Program Direct I/O with Polling Device Interface (API) Operating System 2. The device driver queries the status register in the controller to determine whether or not the device is busy. It polls until it is not. Device Driver Kernel Space Device Controller

2. User Space BLOCKED User Program Direct I/O with Polling Device Interface (API) Kernel Space Operating System 3. The driver stores a command in the command register of the device controller. Device Driver Device Controller

2. User Space BLOCKED User Program Direct I/O with Polling Device Interface (API) Kernel Space Operating System Device Driver Device Controller 4. The controller reads from the device. Since this involves mechanical parts, the read can take some time.

2. User Space BLOCKED User Program Direct I/O with Polling Device Interface (API) Kernel Space Operating System 5. Meanwhile, the device driver queries the status register in the controller to see if the operation is complete. It polls until it is. The CPU cannot be used for anything else. Device Driver Device Controller

2. User Space BLOCKED User Program Direct I/O with Polling Device Interface (API) Kernel Space Operating System 7. The device driver reads the data register(s) in the device controller to get the data that has been read from the device. Device Driver Device Controller

2. User Space BLOCKED User Program Direct I/O with Polling Device Interface (API) Kernel Space Operating System 8. The device driver copies the data into user space. The OS unblocks the application program. Device Driver Device Controller

Handling interrupts on machines that do look-ahead or on super-scalar machines is quite complicated. This discussion is simplified. Interrupts Interrupt controller cpu memory cpu device bus The Interrupt controller issues the interrupt to the CPU. The interrupt includes a number which is used to index into an interrupt table. Device finishes it operation. It writes its status to the Interrupt controller The CPU stops whatever it is doing, and executes the interrupt handler pointed to by the interrupt.

A Device Driver Using Interrupts User Space • Application issues a read( ) call. • The OS blocks the application. User Program Direct I/O with Interrupts Device Interface (API) Kernel Space Operating System Device Driver Device Controller

BLOCKED User Space User Program Direct I/O with Interrupts Device Interface (API) Kernel Space Operating System 2. The device driver queries status registers in the device controller to see if the device is busy. If it is, it issues a wait. Device Driver Device Controller

Device Management