CS472

1. CS472 COMPUTER ARCHITECTURE AND ASSEMBLY LANGUAGE Bruce D’Ambrosio - 107 Dearborn, 7-5563 dambrosi@cs.orst.edu Text: Computer Organization and Design The Hardware/Software Interface Second Edition. Patterson and Hennessy, Morgan Kaufmann.

2. Syllabus • Computer Architecture – processors, memory, I/O. ISA design issues. Design Philosophies and tradeoffs. The importance of measurement and analysis. • Prereq: ECE/CS 375 • Written Homework: weekly, 30% • Midterm: 30% each • Final: 40% • average 472 grade will be a B or B+; set expectations accordingly

3. Schedule Assignment 1: 2.1-2.6, 2.10-2.13, 2.18-2.21 Due 4/7

4. Introduction • Rapidly changing field: • vacuum tube -> transistor -> IC -> VLSI (see section 1.4) • doubling every 1.5 years:memory capacity processor speed (Due to advances in technology and organization) • Things you’ll be learning: • how computers work, a basic foundation • how to analyze their performance (or how not to!) • issues affecting modern processors (caches, pipelines) • Why learn this stuff? • you want to call yourself a “computer scientist” • you want to build software people use (need performance) • you need to make a purchasing decision or offer “expert” advice

5. Where we are headed • Performance issues (Chapter 2) vocabulary and motivation • A specific instruction set architecture (Chapter 3) • Arithmetic and how to build an ALU (Chapter 4) • Constructing a processor to execute our instructions (Chapter 5) • Pipelining to improve performance (Chapter 6) • Memory: caches and virtual memory (Chapter 7) • I/O (Chapter 8)Key to a good grade: reading the book!

6. What is “Computer Architecture” Computer Architecture = Instruction Set Architecture + Machine Organization

7. Computer OrganizationThe layered model

8. SOFTWARE Instruction Set Architecture (subset of Computer Arch.) ... the attributes of a [computing] system as seen by the [systems] programmer, i.e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation. – Amdahl, Blaaw, and Brooks, 1964 -- Organization of Programmable Storage -- Data Types & Data Structures: Encodings & Representations -- Instruction Set -- Instruction Formats -- Modes of Addressing and Accessing Data Items and Instructions -- Exceptional Conditions

9. Example Organization • TI SuperSPARCtm TMS390Z50 in Sun SPARCstation20 MBus Module SuperSPARC Floating-point Unit L2 $ CC DRAM Controller Integer Unit MBus MBus control M-S Adapter L64852 Inst Cache Ref MMU Data Cache STDIO SBus serial kbd SCSI Store Buffer SBus DMA mouse Ethernet audio RTC Bus Interface SBus Cards Boot PROM Floppy

10. What is “Computer Architecture”? Application • Coordination of many levels of abstraction • Under a rapidly changing set of forces • Design, Measurement, and Evaluation Operating System Compiler Firmware Instruction Set Architecture Instr. Set Proc. I/O system Datapath & Control Digital Design Circuit Design Layout

11. Exponential Growth • Machine code • Single-thread OS • Multi-thread • On-line • Graphical UI • Multi-media • Virtual Reality (?)

12. Forces on Computer Architecture Technology Programming Languages Applications Computer Architecture Operating Systems History (A = F / M)

13. Technology => dramatic change • Processor • logic capacity: about 30% per year • clock rate: about 20% per year • Memory • DRAM capacity: about 60% per year (4x every 3 years) • Memory speed: about 10% per year • Cost per bit: improves about 25% per year • Disk • capacity: about 60% per year

14. DRAM chip capacity Microprocessor Logic Density DRAM Year Size 1980 64 Kb 1983 256 Kb 1986 1 Mb 1989 4 Mb 1992 16 Mb 1996 64 Mb 1999 256 Mb 2002 1 Gb Technology • In ~1985 the single-chip processor (32-bit) and the single-board computer emerged • => workstations, personal computers, multiprocessors have been riding this wave since • In the 2002+ timeframe, these may well look like mainframes compared single-chip computer (maybe 2 chips)

15. Processor Performance (SPEC) • performance now improves ­ 50% per year (2x every 1.5 years) RISC introduction Did RISC win the technology battle and lose the market war?

16. Design Analysis Measurement and Evaluation Architecture is an iterative process -- searching the space of possible designs -- at all levels of computer systems Creativity Cost / Performance Analysis Good Ideas Mediocre Ideas Bad Ideas

17. CS472: So what's in it for me? • In-depth understanding of the inner-workings of modern computers, their evolution, and trade-offs present at the hardware/software boundary. • Insight into fast/slow operations that are easy/hard to implementation hardware • Experience with the design processin the context of a large complex (hardware) design. • Functional Spec --> Control & Datapath --> Physical implementation • Modern CAD tools • Designer's "Conceptual" toolbox.

18. Levels of Representation (271 Review) temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; High Level Language Program lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) Compiler Assembly Language Program Assembler 0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111 Machine Language Program Machine Interpretation Control Signal Specification ALUOP[0:3] <= InstReg[9:11] & MASK ° °

19. Layered Machine model

20. Digital Logic Level • Logical Abstraction of physical hardware • Basic elements are gates. • How are gates composed?

21. MicroArchitecture • Registers • Datapaths • Functional Units • ALU • First view of entire machine - sort of

22. Instruction Set Architecture • Instruction-visible registers • Instruction-view of storage • Instruction-available operations • Instruction word format

23. ISA View of CPU (Cont’d)

24. Operating System Level • Storage management • Memory • Files • Programs • Processes • Communication

25. Assembly Language Level 000010 100001 111001 001100 Limit: WORD 2 A: ADD R1, R0 CMP R0, Limit BLT A • Symbolic language • Keywords • Name management • Pseudo-Operations • Meta-language • macros

26. Basics of software development • Program development environment • Assembler • Linker • Loader • Debugger

27. What you should know • Basic machine structure • processor, memory, I/O • Read and write a high-level language • Read assembly language • Understand the concept of virtual memory • Logic design • logical equations, schematic diagrams, FSMs, components

28. Levels of Organization SPARCstation 20 Computer Workstation Design Target: 25% of cost on Processor 25% of cost on Memory (minimum memory size) Rest on I/O devices, power supplies, box Processor Memory Devices Control Input Datapath Output

29. Instruction Fetch Instruction Decode Operand Fetch Execute Result Store Next Instruction Execution Cycle Obtain instruction from program storage Determine required actions and instruction size Locate and obtain operand data Compute result value or status Deposit results in storage for later use Determine successor instruction

30. SPARCstation 20 MBus Slot 1 SBus Slot 1 SBus Slot 3 MBus Slot 0 SBus Slot 0 SBus Slot 2 The SPARCstation 20 Memory SIMMs Memory Controller SIMM Bus MBus Disk Tape SCSI Bus MSBI SEC MACIO SBus Keyboard Floppy External Bus & Mouse Disk

31. SPARCstation 20 The Underlying Interconnect SIMM Bus Memory Controller Standard I/O Bus: SCSI Bus Processor/Mem Bus: MBus Sun’s High Speed I/O Bus: SBus MSBI SEC MACIO Low Speed I/O Bus: External Bus

32. SPARCstation 20 MBus Slot 1 MBus Slot 0 Processor and Caches MBus Module Processor MBus Registers Datapath Internal Cache Control External Cache

33. SPARCstation 20 SIMM Slot 0 SIMM Slot 1 SIMM Slot 2 SIMM Slot 3 SIMM Slot 4 SIMM Slot 5 SIMM Slot 6 SIMM Slot 7 DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM Memory Memory SIMM Bus Memory Controller DRAM SIMM

34. SPARCstation 20 SBus Slot 1 SBus Slot 3 SBus Slot 0 SBus Slot 2 Input and Output (I/O) Devices • SCSI Bus: Standard I/O Devices • SBus: High Speed I/O Devices • External Bus: Low Speed I/O Device Disk Tape SBus SCSI Bus SEC MACIO Keyboard Floppy External Bus & Mouse Disk

35. SPARCstation 20 Standard I/O Devices • SCSI = Small Computer Systems Interface • A standard interface (IBM, Apple, HP, Sun ... etc.) • Computers and I/O devices communicate with each other • The hard disk is one I/O device resides on the SCSI Bus Disk Tape SCSI Bus

36. SPARCstation 20 SBus Slot 1 SBus Slot 3 SBus Slot 0 SBus Slot 2 High Speed I/O Devices • SBus is SUN’s own high speed I/O bus • SS20 has four SBus slots where we can plug in I/O devices • Example: graphics accelerator, video adaptor, ... etc. • High speed and low speed are relative terms SBus