1 / 14

2-4 中斷

2-4 中斷. 外部中斷 :INT0~INT3, PINT’ 內部中斷 : 微控器內部裝置 ( 計時模組 TM,LVD,SIM…). 中斷控制相關位元 致能位元 :ADE,INT0E,MF1E…. 中斷要求旗標 :ADF,INT0F,MF1F…. 11 種中斷來源. 7 個中斷源為單一周邊 INT0~INT1,Comparator 0~1,A/D,Time Base 0~1 4 個 Multi-Function 由 13 個周邊中斷源共享

zorina
Download Presentation

2-4 中斷

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. 2-4 中斷

  2. 外部中斷:INT0~INT3, PINT’ • 內部中斷:微控器內部裝置(計時模組TM,LVD,SIM…)

  3. 中斷控制相關位元 • 致能位元:ADE,INT0E,MF1E…. • 中斷要求旗標:ADF,INT0F,MF1F….

  4. 11種中斷來源 7個中斷源為單一周邊 • INT0~INT1,Comparator 0~1,A/D,Time Base 0~1 4個Multi-Function由13個周邊中斷源共享 • TM0P~TM3P,TM0A~TM3A,TM1B,SIM,External Peripheral(PINT’),LVD,EEPROM

  5. 2-5 TM • 計時器/計數 • 輸入捕捉(input capture) • 比對吻合輸出(compare match output) • 單脈充輸出(single pulse output) • PWM信號產生

  6. HT66F50 • 10bit CTM [TM0], compact 精簡型 • 10bit ETM [TM1], enhance 增強型 • 16bit STM [TM2], standard 標準型 • 10bit CTM [TM3]

  7. 10bit CTM [TM0], compact 精簡型 • 計時器/計數 • 比對吻合輸出(compare match output) • PWM信號產生

  8. Figure 2-5-7 • 10 bit上數counter [TMnD] • TMnA (10 bit comparator) • TnRP(3 bit comparator) • 由TMnC0, TMnC1特殊功能暫存器控制

  9. TMnC0 控制暫存器(表2-5-12) TnPAU TnCK2 TnCK1 TnCK0TnONTnRP2 TnRP1 TnRP0 Bit 7 6 5 43 2 1 0 Bit [7] ; TnPAU = 1, 暫停計數 = 0, 繼續計數 Bit [6 5 4] ; TnCK2 TnCK1 TnCK0 = 000 , fINT= fsys/4 =100, fINT= fINT = 001 , fINT= fsys =101 ,保留 = 010 , fINT= fsys/16 =110 , fINT=TCKn = 011 , fINT= fsys/64 =111 , fINT= TCKn’ Bit [3] ;TnON =1 ,開始計數 =0,停止計數

  10. TMnC0 控制暫存器 TnPAU TnCK2 TnCK1 TnCK0TnONTnRP2 TnRP1 TnRP0 Bit 7 6 5 43 2 1 0 Bit [2 1 0 ] ; TnRP2 TnRP1 TnRP0 = 000 , 週期= 1024x fINT-1 =100,週期= 512x fINT-1 = 001 ,週期= 128x fINT-1 =101 ,週期= 640x fINT-1 = 010 ,週期= 256x fINT-1 =110 ,週期= 768x fINT-1 = 011 ,週期= 384x fINT-1 =111 ,週期= 896x fINT-1

  11. TMnC1 控制暫存器 TnM1 TnM0 TnIO1 TnIO0 TnOC TnPOL TnDPX TnCCLR Bit 7 6 5 4 3 2 1 0 Bit [7 6] ; TnM1 TnM0 = 00 , 比對吻合輸出模式 = 01 , 未定義 = 10 , PWM = 11 , 計時/計數 Bit [0] ; TnCCLR =1, 當比較器A 比對吻合時清除計數器 =0,當比較器p 比對吻合時或計數器溢位清除計數器

  12. TMnC1 控制暫存器 TnM1 TnM0 TnIO1 TnIO0 TnOC TnPOL TnDPX TnCCLR Bit 7 6 5 4 3 2 1 0 Bit [5 4] ; TnIO1 TnIO0 = 00 , 比對吻合輸出不變 = 01 ,比對吻合輸出0 = 10 ,比對吻合輸出1 = 11 ,比對吻合輸出轉態 Bit [0] ; TnCCLR =1, 當比較器A 比對吻合時清除計數器 =0,當比較器p 比對吻合時或計數器溢位清除計數器

  13. TMnC1 控制暫存器 TnM1 TnM0 TnIO1 TnIO0TnOC TnPOL TnDPX TnCCLR Bit 7 6 5 4 3 2 1 0 Bit [3] ; TnOC ….. …. Bit [0] ; TnCCLR =1, 當比較器A 比對吻合時清除計數器 =0,當比較器p 比對吻合時或計數器溢位清除計數器

  14. TMnC1 控制暫存器 TnM1 TnM0 TnIO1 TnIO0TnOC TnPOL TnDPX TnCCLR Bit 7 6 5 4 3 2 1 0 Bit [5 4] ; TnIO1 TnIO0PWM = 00 , inactive = 01 ,Active = 10 ,PWM輸出 = 11 ,undefined Bit [0] ; TnCCLR =1, 當比較器A 比對吻合時清除計數器 =0,當比較器p 比對吻合時或計數器溢位清除計數器

More Related