Counters

1. Counters

2. 1 10 00 1 1 01 11 1 Introducing counters • The digital circuit used for counting pulses is known as counter. • Counters are a specific type of sequential circuit. • The output value increases by one on each clock cycle. • After the largest value, the output “wraps around” back to 0. • Using two bits, we’d get something like this:

3. COUNTERS CHARACTERISTICS 1. MODULUS- number of counts in one cycle 2. Up or down count 3. Asynchronous or synchronous operation 4. Free running or self stopping

4. COUNTER TYPES Asynchronous Counter (Ripple or Serial Counter): each FF is triggered one at a time with output of one FF serving as clock input of next FF in the chain. Synchronous Counter (Parallel Counter): all the FF’s in the counter are clocked at the same time. Up Counter: counter counts from zero to a maximum count. Down Counter: counter counts from a maximum count down to zero. BCD Counter: counter counts from 0000 to 1001 before it recycles. Pre-settable Counter: counter that can be preset to any starting count either synchronously or asynchronously Ring Counter: shift register in which the output of the last FF is connected back to the input of the first FF. Johnson Counter: shift register in which the inverted output of the last FF is connected to the input of the first FF.

5. Asynchronous Counters • async = events that DO NOT occur at the same time • async counter = FFs within the counter DO NOT have a common clock pulse

6. Asynchronous Counters • async = events that DO NOT occur at the same time • async counter = FFs within the counter DO NOT have a common clock pulse

7. Asynchronous Counters • async = events that DO NOT occur at the same time • async counter = FFs within the counter DO NOT have a common clock pulse

8. Synchronous Counter • FFs in the counter are clocked at the same time by a common clock pulse.

9. COUNTERS ASYNCHRONOUS SYNCHRONOUS

10. ASYNCHRONOUS COUNTERS • Only LSB flip-flop controlled by the clock input • Also known as a RIPPLE COUNTER because count is like a chain reaction that ripples through the counter because of time involved. • Two or more “T” flip-flops interconnected, output • of each flip-flop connected to clock input of the next. • Modulus- number of stable states in each flip-flop cycle • Modulus = N= number of flip-flops • Highest number in count =

11. 2-bit Asynchronous Binary Counter

12. 2-bit Asynchronous Binary Counter 0 1 0 1 0 0 1 1

13. 3-bit Async Bin Counter

14. 3-bit Async Bin Counter

15. 3-bit Async Bin Counter

16. Propagational Delay major disadvantage!

17. 4-bit Async Bin Counter

18. Asynchronous Decade counter

19. BUILD A 4 BIT RIPPLE COUNTER 1. 4 JK flip-flops in toggle mode- all JK inputs tied high 2. Q outputs connected to clock input of following flip-flop 3. FF A = LSB (one with clock input); toggles when input clock toggles from high to low; FF D = MSB 4. FF B, C, D do not toggle till receive NGT from proceeding FF 5. Direction of count can be reversed by complementing each FF’s output or complementing each FF’s input

20. RIPPLE COUNTER!` Binary Output Clock Input 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 1 1 0 0 0 0 1 1 0 Pulse 5 Pulse 8 Pulse 7 Pulse 6 Pulse 4 Pulse 1 Pulse 2 Pulse 3 This 4-bit counter has 16 states and will count from binary 0000 through 1111 and then reset back to 0000. The counter has amodulus of 16. On the next clock pulse (8) all FFs will toggle because each will receive aH-to-Lpulse- one after another. Watch the count ripple thru the counter. All J-K flip-flops in the TOGGLE MODE PS and CLR input are INACTIVE

21. Clock input 1s output 2s output 4s output RIPPLE COUNTER WITH WAVEFORMS Binary Output Clock Input 0 0 1 1 0 1 0 0 0 0 0 1 0 1 0 1 0 0 1 0 0 0 0 0 Pulse 5 Pulse 1 Pulse 2 Pulse 3 Pulse 4 FFs triggered on H-to-L pulse. CLK toggles 1s FF. 1s FF toggles 2s FF. 2s FF toggles 4s FF.

22. Asynchronous Decade Counters • Binary counters • count from 0 to 2n-1 (n=no. of FFs) • What if ... you need to count just from 0 to 9?

23. Short negative pulse To clear input of each FF DECADE COUNTER Initial count at 0111 Binary Output Clock Input 1 0 0 1 0 0 0 0 0 0 0 1 0 0 1 0 0 1 1 1 0 1 0 0 0 1 0 1 1 0 0 0 0 0 1 1 Pulse 7 Pulse 6 Pulse 5 Pulse 4 Pulse 3 Pulse 2 Pulse 1 Pulse 8 All J & K inputs = 1 All PR inputs = 1 Count is at 1001. Next clock pulse will increment counter for a short time to 1010 which will activate the NAND gate and reset the counter to 0000. To change mod-16 counter to decade counter: Reset count to 0000 after 1001 (9) count. When count hits 1010 reset to 0000. See added 2-input NAND gate that clears all JK FFs to 0 when count hits 1010.

24. 2-bit Synchronous Binary Counter

25. 3-bit Synchronous Binary Counter

26. 4-bit Synchronous Decade Counter

28. Up/Down Sync Counters • progressing in either direction (up/down) • may be called a bidirectional counter 0 1 2 3 4 5 4 3 2 3 4 5 6 7 6 5 etc... up dn up dn