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CELL Processor

CELL Processor. An overview. By Andy P. and Gene D. The Cell. Table of Contents. Motivation Context Architecture Developing Environment. Motivation. Rising power needs are limiting the increases in speed. Transistors can no long handle the heat generated by the power demands.

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CELL Processor

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  1. CELL Processor An overview. By Andy P. and Gene D.

  2. The Cell

  3. Table of Contents • Motivation • Context • Architecture • Developing Environment

  4. Motivation • Rising power needs are limiting the increases in speed. • Transistors can no long handle the heat generated by the power demands. • Intel and AMD have already introduced dual-core processor.

  5. Context • Multiprocessors are the way of the future • The Cell is a unique approach • Nine cores. • 1 Power Processing Unit (PPU) • 8 Synergistic Processing Units (SPU) • Elements connected together by the Internal Element Interconnect Bus (EIB)

  6. PPU • Dual-threaded 64-Bit Power PC core. • L2 512kb Cache. • Direct access to system memory. • Responsible for running the OS and coordination of the SPUs.

  7. SPUs • Synergistic Processing Units • 256kb of local store, no cache. • Access to system memory must be handled through DMA via the Memory Flow Controller (MFC).

  8. CELL Architecture Overview

  9. CELL Simulator • IBM produced a program which simulates the CELL processor. • Runs on RedHat Fedora. • It’s FREE. • Language – C

  10. Simulator

  11. Simulator

  12. FFTs on the CELL • The CELL environment offers up the potential for strong use of parallelization. • FFTs have the potential to take advantage of this attribute if the algorithm is modified correctly.

  13. Questions?

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