1 / 25

Switched Capacitor DC-DC Converters: Topologies and Applications

Switched Capacitor DC-DC Converters: Topologies and Applications. Bill Tsang and Eddie Ng. Outline. Motivations Dickson’s Charge Pump Other Various Charge Pumps Applications Conclusion. Motivations. Inductorless On-chip integration Low cost High switching frequency

elina
Download Presentation

Switched Capacitor DC-DC Converters: Topologies and Applications

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Switched Capacitor DC-DC Converters: Topologies and Applications Bill Tsang and Eddie Ng

  2. Outline • Motivations • Dickson’s Charge Pump • Other Various Charge Pumps • Applications • Conclusion

  3. Motivations • Inductorless • On-chip integration • Low cost • High switching frequency • Easy to implement (open-loop system) • Fast transient but large ripple • High efficiency but limited output power

  4. Ideal Dickson’s Charge Pump(Phase 1) 2VDD-Vt VDD VDD-Vt VDD-Vt VDD-Vt 0 VDD • Clk=0, Clk_bar=VDD • Finite diode voltage drops, Vt

  5. Ideal Dickson’s Charge Pump(Phase 2) 3VDD-2Vt 2VDD-Vt VDD 2VDD-2Vt VDD-Vt VDD-Vt VDD 0 • Clk=VDD, Clk_bar=0 • Maximum voltage stress on diodes 2VDD-Vt => reliability issue • Maximum voltage stress on capacitors VCn =n(VDD-Vt) => reliability issue

  6. Dickson’s Charge Pump C1=C2=C3=C (Body effect can be significant at later stages)

  7. Non-idealities • Threshold voltage drop [Mos charge pumps for low-voltage operation] • Parasitic capacitor divider voltage drop • Low conversion efficiency and pumping gain • Limited maximum number of stages [An on-chip High-voltage generator circuit for EEPROMs with a power supply voltage below 2V]

  8. Modified Switch CTS • Static Charge Transfer Switches (CTS) • Eliminate transistor threshold drop

  9. Modified Dickson’s Charge Pump #1 (NCP-1) Conditions: 1, Clk=Vdd,Clk_bar=0: v2, v3+V To turn on transistor Ms2; Vgs = 2V 2, Clk=0,Clk_bar=VDD: v1, v2+V,v3 To turn off transistor Ms2; Vgs = 2V impossible

  10. Modified Dickson’s Charge Pump #1 (NCP-1) • Static Charge Transfer Switches (CTS) • Better voltage pumping gain than diodes • Lower voltage equals upper voltage of pervious stage • Utilizing higher voltage from following stage to drive CTS • Reverse charge sharing since CTS cannot turn off completely

  11. Modified Switch #2 MN1 used to turn off MS1 MP1 used to turn on MS1 MN1 MP1 Next stage • Eliminate transistor threshold drop • Complete turn-off of switch, MS1

  12. Modified Dickson’s Charge Pump #2 (NCP-2) Conditions: 1, Clk=Vdd,Clk_bar=0: v2, v3+V To turn on transistor MP2 and MS2; Vgs = 2V 2, Clk=0,Clk_bar=VDD: v1, v2+V,v3 To turn on transistor MN2 and turn off MS2; Vgs = 2V

  13. Complete Circuit(NCP-2) • Careful PMOS well connection to prevent latch-up • Diode-connected output stage used

  14. Modified Dickson’s Charge Pump #3 (NCP-3) NCP-3 uses boosted clock at output stage

  15. Converters Output Voltage Results

  16. Optimum Capacitance Selection • [A Low-Ripple Switched-Capacitor DC-DC Up converter for Low-voltage applications]

  17. Efficiency and Output Impedance [Performance limits of switched-capacitor DC-DC Converter] • Power loss due to: Vth, Rds(on), ESR, Cp, etc • Efficiency estimation • Output impedance (slow switching) M=ideal conversion ratio [Performance limits of switched-capacitor DC-DC Converter] Ts=switching period i= parasitic time constant q=charge supplied to the source Vout

  18. Cross-Coupled Charge Pump • PMOS to transmit 2VDD to output • Bodies tied to source(highest voltage) to avoid forward biasing junction diodes [Area-efficient CMOS Charge Pumps for LCD Drivers]

  19. H-bridge Topology • Commercial products (Linear Technology, Fairchild, Maxim …) • Buck or Boost functions • Negative voltage generation

  20. H-bridge Topologies Phase 1: transistors in red are on Phase 2: transistors in blue are on Vout = 2Vin Vout = -Vin Vout = 0.5 Vin

  21. Application (1): Flash Memory • Floating gate programming • Control gate voltage >> Vdd [ee141 lecture]

  22. Application (1): Flash Memory Nominal VDD= 5V

  23. Application (2): Sample Switches • S/H circuit– constant vgs sampling with all input level • Reduces distortion • Reduces Rds(on) Voltage doubler

  24. Application (3): Low voltage Amplifier • Positive zero in Miller compensation • 1/gm pole-zero cancellation [charge-pump assisted low-power/low-voltage CMOS Opamp Design] >2VGS

  25. Conclusion • Different Dickson’s SC converters discussed • Optimal Capacitor size selection • Discussion of cross-coupled doublers • Commercial product: Full H-bridge • Applications: Flash, ADC, Amplifier, LCD driver

More Related