A Harvard Machine

1. A Harvard Machine • Calculator • Calculator  Computer

2. Hoofdcomponenten Calculator: • Program Counter (PC) • Instruction Memory • Registerfile • Arithmetic Logic Unit (ALU)

3. Instruction Memory Instruction Memory Address Data data uitgang (35 bit) adres ingang (16 bit) Hoeveelbit is dit geheugen?

4. Blokschema Registerfile First Register Address Data Second Register Address Data Destination Reg. Address Data adres ingang (4bit) data uitgang (16 bit) data uitgang adres ingang (4bit) adres ingang (4 bit) data ingang clock Hoeveel bit is dit geheugen?

5. Register Write Clock 16 to 1 mux Data out 1st Reg. 4 to 16 deco-der & Register 15 Data out 2nd Reg. 16 to 1 mux Dest. Reg. # & & Register 0 Data in 1st Register # 2nd Register # Figuur 13 De registerfile Blokschema Registerfile

6. S0 S1 A Y B Figuur 3: Schema ALU ALU S1 S0 A A Y B

7. First Register Address Data Second Register Address Data Destination Reg. Address Data Architectuur van de rekenmachine Control Instruction Memory Registerfile (16) ALU PC Instruction Address 4 bit address 16 bit data 3 bit control

8. Instructie types • Rekenkundige en logische • ADD • SUB • AND • Immediate • LOADI • ADDI • SUBI • ANDI • Datatransfer • MOVE

9. Datapad van een Rekenkundige/logische instructie: bijv. ADD Instruction Memory Registers ALU 1st register # PC Instruction 2nd register # Address Dest. reg. # Data ADD $0, $1, $2 r0 = r1 + r2 Assembly Language

10. Datapad van een immediate instructie: bijv. ADDI Instruction Memory Registers ALU 1st register # PC Instruction 2nd register # Address Dest. reg. # Data ADDI $0, $1, 0x100 r0 = r1 + 0x100 Assembly Language

11. 16 bit calculator

12. SUBI $4, $3, 0100

13. Demo rekenmachine

14. Van rekenmachine  processor • Toevoegen: • Data Memory • Componenten om “loopjes” te kunnen executeren

15. Uitbreiding met Data Memory Instruction Memory Registers (16) DataMemory ALU Register # PC Address Instruction Register # Address Data out Register # Data in Data Bij een Harvard architectuur is het geheugen gescheiden in twee delen: instructiegeheugen en datageheugen

16. Uitbreiding instructieset Store Word (SW): Registers  Data Memory Load Word (LW): Registers  Data Memory

17. Syntax SW rd, index(rs) Store Word to Memory SW $0, 0d100($1) r0 Address (100 + r1) Instruction Memory Registers DataMemory 100 ALU 1st register # PC Instruction 2nd register # Address Address Dest. reg. # Data Data SW r0, 100(r1) Memory[r1 + 100] = r0

18. LW rd, index(rs) Load Word from Memory LW $2, 0d100($1) r2 Address (100 + r1) Instruction Memory Registers DataMemory 100 ALU 1st register # PC Instruction 2nd register # Address Address Dest. reg. # Data Data LW r2, 100(r1) r2= Memory[r1 + 100]

19. BRA offset Branch Always to “label” BRA label PC  PC + offset BZ rt, offset Branch if rt = 0 BZ $6, end If (r6 = 0) goto ‘end’ BEQ rs, rt, offset Branch if rs = rt BEQ $6, $8, loop If (r6 = r8) goto ‘loop’ 0004 0009 Instruction Memory ADD DataMemory Offset FFFB 1st register # Branch & LOAD z Instruction 2nd register # PC Address ALU Address Dest. reg. # Data out Data in Data out Registers Uitbreiding hardware en instructieset voor ‘loopjes’:

20. De status van de Harvard machine na het uitvoeren van de instructie Load Immediate 0x01FD