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Introducing the Xilinx Spartan Series

High Performance, Low Cost FPGAs with on-chip SelectRAM Memory. Introducing the Xilinx Spartan Series. Xilinx 4000 Heritage. Xilinx Spartan Series FPGAs. Advanced Process Technology. >80 MHz Performance On-chip SelectRAM Software and cores. Smallest die size. Low packaging cost

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Introducing the Xilinx Spartan Series

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  1. High Performance, Low Cost FPGAs with on-chip SelectRAM Memory Introducing the Xilinx Spartan Series

  2. Xilinx 4000 Heritage Xilinx Spartan Series FPGAs Advanced Process Technology >80 MHz Performance On-chip SelectRAM Software and cores Smallest die size Low packaging cost Low test cost Total Cost Management

  3. Complete High Volume FPGA Solution Spartan: 5 Volt with up to 40K System Gates Spartan-XL: 3.3 Volt with up to 40K System Gates Xilinx Alliance and Foundation Software Process technology leap XC4000 heritage Most successful FPGA architecture No compromises Performance, RAM, Cores & Low Price Xilinx Spartan Families

  4. Advanced Process core-limited pad-limited Core Core I/O pads I/O pads I/O count determines die size Gate count determines die size Spartan Die Size for High I/O package Nearly Equivalent to Gate Arrays

  5. Transistor gates 0.35 Allows 3.3 V supply All other features 0.25 Small size Low capacitance Performance Low power Spartan-XL Family Advanced 0.35m Process Chip Combines 3.3 V operation with 0.25 benefits

  6. Xilinx has changed the rules! No more compromises Gates-only solutions are no longer required Spartan Series delivers key ASIC requirements with all the FPGA advantages Performance On-chip SelectRAM Memory Cores Low price Xilinx Spartan Series Benefits The industry’s BEST high volume FPGA solution!!

  7. Xilinx Spartan Series Devices 5 Volt -> XCS05 XCS10 XCS20 XCS30 XCS40 3.3 Volt -> XCS05XL XCS10XL XCS20XL XCS30XL XCS40XL System Gates 2K-5K 3K-10K 7K-20K 10K-30K 13K-40K Logic Cells 238 466 950 1368 1862 Max Logic Gates 3,000 5,000 10,000 13,000 20,000 Flip-Flops 360 616 1120 1536 2016 Max RAM bits 3,200 6,272 12,800 18,432 25,088 Max Avail. I/O 77 112 160 192 224 Performance 80MHz 80MHz 80MHz 80MHz 80MHz No Compromises: Performance, RAM, Cores, and Low Price

  8. Spartan part name uses “System Gates” Includes both RAM and Logic High end of current published gate range Matches ASIC industry terminology Consistent with future FPGA families Spartan Naming XCS##XL-3PC84C XL = 3.3 Volt no XL = 5 Volt XCS = Spartan ## = System Gates

  9. Highest volume ASIC plastic packages Footprint compatible in common packages Spartan Series Footprint Compatibility 5 Volt XCS05 XCS10 XCS20 XCS30 XCS40 3.3 Volt XCS05XL XCS10XL XCS20XL XCS30XL XCS40XL PC84 PC84 VQ100 VQ100 VQ100 VQ100 TQ144 TQ144 TQ144 CS144 (XL) CS144 (XL) PQ208 PQ208 PQ208 PQ240 PQ240 BG256 BG256 CS280 (XL) CS280 (XL)

  10. Pinout Compatibility • Complete pinout compatibility within Spartan Series • Not directly pinout-compatible with XC4000/XC5200 • Differences in Mode pins • Spartan PQ208 pinouts optimized to add additional I/O

  11. Spartan Speed Grades • Higher speed grade = higher performance XL-5 XL-4 E-1 -4 E-2 Performance -3 -3 -4 5200 4000E Spartan Spartan-XL

  12. Spartan Series Meets ASIC Requirements:Price and Performance FPGAs with RAM Spartan Series Fills the FPGA Price-Performance and RAM “Gap” FPGAs without RAM Price ASIC Speed, IP/Core Support

  13. Use of Memory in ASICs grew from 65% in 1995 to 78% in 1997 Spartan Series Meets ASIC Requirements: Cores/IP & RAM ASIC IP/CORE Usage Analog Peripherals Micro- controller Many CORES require RAM (PCI, DSP, USB, etc.) Scan Test On-Chip Memory 0% 25% 50% 75% 100% Source: Dataquest

  14. Spartan Series Meets ASIC Requirements: Low Price Cost of Ownership Per Unit ($) FPGA Cost of Ownership Advantage No test vectors required Limited or no simulation Automatic Place and Route Re-spins in hours not months Faster Time-to-Market No NRE 10x Lost Opportunity NRE Development Cost Development Cost 2x 1x Unit Cost Unit Cost ASIC FPGA

  15. Leading edge process technology Smallest die size of any FPGA with on-chip RAM Focused package offering Low-power architecture allows use of highest volume plastic packages Streamlined test flow Lower cost test hardware Built-in self test features and shorter test times Optimized manufacturing flows Total Cost Management

  16. Total Cost Management Relative Cost 1993 4 Assembly Test 3 1995 Silicon Majority of cost is back end (assembly, test, overhead) Spartan Series die are pad limited 1996 2 1997 1 0 Advanced 0.6m FPGA 0.6m FPGA 0.5m FPGA 2LM 3LM 3LM 0.5m FPGA Spartan Series addresses all aspects of cost

  17. Priced for High-Volume Leadership Spartan-III $10 500K Spartan-III 200K $5 Spartan-II 100K 100K Spartan-XL System Gates 40K 40K 30K 30K 10K Gates Per Dollar in 1999! 20K Price projections are for 250Ku, least-expensive package, slowest speed grade 10K 1997 1998 1999 2000 2001 2002 2003 2004

  18. System Logic Volume Pkg Gates Cells Price* XCS05XL PC84 5,000 238 $2.49 XCS10XL PC84 10,000 466 $3.50 XCS20XL VQ100 20,000 950 $4.25 XCS30XL VQ100 30,000 1368 $5.50 XCS40XL PQ208 40,000 1836 $7.40 Spartan-XL Family Pricing Under $3 for 5,000 Gates!! *100Ku minimum volume, slowest speed grade

  19. Spartan-XL inputs accept 5V signals Spartan-XL outputs drive standard TTL 100% compatible in 5 volt environment Spartan-XL Family Voltage Compatibility 5V 3.3V Any 5 V device 5V Spartan-XL FPGA Advanced 0.35 3.3V Core 3.3V I/O 3.3V Meets TTL Levels

  20. Without Compromises Pricing competitive with ASICs High Performance On-chip SelectRAMTM PCI LogiCORE + AllianceCORE FPGA Price Leadership Higher Speed Lower Power Power Down Mode Spartan $395 per 5K gates Spartan-XL $249 per 5K gates 0.5 3LM 5 Volt Higher Density + More Features Price SpartanII up to 100K gates Spartan Next Generation up to 200K gates 0.35 5LM 3.3 Volt 0.25 5LM 0.18 2.5 Volt 1.8 Volt 1998 1999 2000 *Prices are for 100K units, slowest speed, lowest cost package

  21. Two 4-input LUTs and one 3-input LUT Two edge-triggered FFs Spartan CLB

  22. Spartan IOB

  23. Synchronous write, asynchronous read 16 x 2 or 32 x 1 max per CLB Single-Port RAM

  24. One common synchronous write port Two asynchronous read ports 16 x 1 max per CLB Dual-Port RAM

  25. Supported RAM Modes • Per CLB: 16 x 1 16 x 2 32 x 1 Edge- Triggered Timing Single- Port X X X X Dual- Port X X

  26. RAM Provides 16X the Storage of Flip-Flops • 32 bits Vs. 2 bits of storage • 32 x 8 shift register with RAM = 11 CLBs • Using flip-flops, takes 128 CLBs for data alone CLB CLB D1 32 bits 2 bits D1 D Q Q1 A0 O1 A1 A2 D2 D Q Q2 A3 A4 CLK WE

  27. Software Support for Spartan Rev. Software Capability 2.1i Spartan Libraries X Spartan-XL Libraries X Spartan Implementation X Spartan Speed File X Spartan-XL Implementation X Spartan-XL Speed File Service Pack

  28. XC4000E Library Components Not Allowed in Spartan Designs • No Asynchronous RAM • No RAM16X1, RAM32X1 • Only RAM16(32)X1S, RAM16X1D, ROM16X1 • No Edge Decoders • No DECODEx • No Wired-AND • No WANDx or WOR2AND • Mode Pins Not Usable as I/O • No MD0, MD1, MD2

  29. New Features in Spartan-XL Family • Higher speed (-4/-5) • 8 flexible global low-skew buffers (BUFGLS) • CLB latches • Input Fast Capture Latch • Output multiplexer or lookup table • 3.3V supply for low power with 5V tolerance • Programmable 3V input clamp for 3V PCI • Programmable 24 mA output drive for 5V PCI • Power-down pin • Improved boundary scan • Express parallel configuration mode

  30. Power by Costs Less Than Standard ICs $20 *Supported devices: XCS20XL XCS30XL XCS40XL External PLD7K Gates $15 Standard ChipPCI Master I/F Component cost 100K units $10 XCS20XL-4 TQ144* $5 7K Gates Logic PCI Master I/F Standard Chip Solution <$7

  31. CORE Solutions XCS30XL Percentage of Effective Core Function Price Device Used Function Cost UART $6.95 17% $1.30 16-bit RISC Processor $6.95 36% $2.60 16-bit, 16-tap $6.95 27% $2.00 Symmetrical FIR Filter Reed-Solomon Encoder $6.95 6% $0.50 LogiCORE PCI32 Spartan $8.25 45% $3.80 (in PQ208) *Prices are for 100K units, plastic package

  32. Spartan Advantages Over Altera Flex 6K/10K • SelectRAM • Cores • PCI and DSP LogiCORE • AllianceCORE • Density • Five devices at both 3.3V and 5V • Performance • 12% faster

  33. Flex 6000 = Lower Price Replacement for 8K Based upon 1994 XC5200 technology Positioned as “first” Gate Array replacement FPGA Altera Flex 6000 6000 Advantages Improved Flex 8K routing Less expensive than 10K Equivalent performance to 8K Faster than XC5200 6000 Disadvantages Limited devices available today No RAM, no I/O Flip-Flops Limited footprint compatibility Slower than Spartan/XC4000 Non-Segmented Interconnect Limited software support

  34. System Features Comparison

  35. Spartan Series vs. Altera 6000/A Max Xilinx Logic Altera Max I/O Device Cells Device I/O 77 XCS05/XL 238 112 XCS10/XL 466 880 EPF6010A 117 160 XCS20/XL 950 1320 EPF6016/A 204/171 192 XCS30/XL 1368 205 XCS40/XL 1862 1960 EPF6024A 218 5 devices for 5V and 5 devices for 3.3V Only 1 device for 5V, 3 devices for 3.3V * A logic cell is a 4 input Look up table and a Flip-Flop ** XL and A represent 3.3V devices for Xilinx and Altera respectively

  36. Spartan Series vs. Altera 10K 5 devices for 5V and 5 devices for 3.3V Only 2 low density 3.3V devices * A logic cell is a 4 input Look up table and a Flip-Flop ** XL and A represent 3.3V devices for Xilinx and Altera respectively

  37. Xilinx Footprint Compatibility Leadership vs. FLEX 6K/A 5 Volt 3.3 Volt BG256 PQ240 PQ208 TQ144 VQ100 PC84 XCS05 XCS10 XCS20 XCS30 XCS40 6010A 6016A 6024A XCS05XL XCS10XL XCS20XL XCS30XL XCS40XL 6016 Altera 6KA Spartan Altera 6K Spartan-XL

  38. Xilinx Footprint Compatibility Leadership vs. FLEX 10K/A 5 Volt 3.3 Volt BG356 BG256 PQ240 PQ208 TQ144 VQ100 PC84 XCS05 XCS10 XCS20 XCS30 XCS40 XCS05XL XCS10XL XCS20XL XCS30XL XCS40XL 10K10 10K20 10K30 10K10A 10K30A Altera 10KA Spartan Altera 10K Spartan-XL

  39. 60 50 5.0V SpartanXL K Factor = 11 40 30 20 2.5V 3.3V 10 0 6K 10K 6KA 10KE 10KA Spartan XCS30XL Spartan-XL Provides Lowest Power K Factor

  40. No Compromises • High Performance • On-Chip SelectRAMTM • Wide range of IP and CORE solutions • PCI LogiCORE + AllianceCORE • Fully integrated software support • Volume Pricing competitive with ASICs Addresses the key needs of high-volume logic users

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