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Getting the chip fabricated and tested

Getting the chip fabricated and tested. Dr.K.S.Gurumurthy, Bangalore University Mr. Senthil Kumar, Kongu Engg College,Erode Dr.Tilak, GEC, AP Dr.Bhanu Bhaskara, JNTU, Hyderabad Dr.B.P.Harish, Bangalore University B.kalivaraprasad SVECW-bhimavaram(A.P). AGENDA. Motivation

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Getting the chip fabricated and tested

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  1. Getting the chip fabricated and tested Dr.K.S.Gurumurthy, Bangalore University Mr. Senthil Kumar, Kongu Engg College,Erode Dr.Tilak, GEC, AP Dr.Bhanu Bhaskara, JNTU, Hyderabad Dr.B.P.Harish, Bangalore University B.kalivaraprasad SVECW-bhimavaram(A.P)

  2. AGENDA • Motivation • What are the foundries available • Semiconductor Complex Ltd., Chandigarh • Summary IUCEE WORKSHOP - VLSI DESIGN

  3. Motivation • To present an overview of the IC fabrication facilities available to Universities in India. • To encourage faculty/students to tape out designs, for fabrication and characaterization, to demonstrate proof of concept. IUCEE WORKSHOP - VLSI DESIGN

  4. What are the foundries available? • Semiconductor Complex Ltd., Chandigarh • MOSIS, US • Europractice, EU - AMIS - TSMC - Austria Microsystems - UMC IUCEE WORKSHOP - VLSI DESIGN

  5. Semiconductor Complex Ltd , Chandigarh • The ‘India Chip Program’ is a program of Multi-Product Wafer runs at regular intervals at SCL. • The program envisages to put different circuits from various designers on a common mask set and wafers, to reduce the cost of prototyping per design. IUCEE WORKSHOP - VLSI DESIGN

  6. Who can use India Chip Program? • The India Chip Program is ideally suited for validating small circuit concepts being done by • Academic Institutions • Research Institutions • Entrepreneurs • Commercial Organisations IUCEE WORKSHOP - VLSI DESIGN

  7. IC Designers in the country can design circuits using SCL’s Design Kit that includes SCL’s Cell Library, Design Rules and Model Parameters. • Using SCL’s Design Kit, IC Designers can do complete design of the circuit and generate GDSII data for mask fabrication. • Mask fabrication, wafer fabrication and parametric testing shall be taken up by SCL. IUCEE WORKSHOP - VLSI DESIGN

  8. Flow Chart of the Activities of SCL IUCEE WORKSHOP - VLSI DESIGN

  9. How to send your design data to SCL? • On conceptualization of the design the designer will send details about the design concept to SCL in a Preliminary Product Description Document. • Once your design is complete SCL will accept design data in GDSII format. (If Cadence is used, please perform a stream-out with library version 3.0. Data may please be sent on CD or through email or through FTP). IUCEE WORKSHOP - VLSI DESIGN

  10. Charges for fabrication under India Chip Program IUCEE WORKSHOP - VLSI DESIGN

  11. Summary • Fabrication facilities are explored for IC prototyping and characterization. • SCL’s India Chip program is taken as case study and it seems to be viable. IUCEE WORKSHOP - VLSI DESIGN

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