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Fault Coverage Analysis of RAM Test Algorithms

Fault Coverage Analysis of RAM Test Algorithms. Marc Riedel McGill University, Montreal, Canada Janusz Rajski Mentor Graphics, Wilsonville, Oregon. Outline. Motivation Fault Models Methodology and Complexity Fault Simulation Results Conclusions. Motivation.

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Fault Coverage Analysis of RAM Test Algorithms

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  1. Fault Coverage Analysis of RAM Test Algorithms Marc Riedel McGill University, Montreal, Canada Janusz Rajski Mentor Graphics, Wilsonville, Oregon

  2. Outline • Motivation • Fault Models • Methodology and Complexity • Fault Simulation Results • Conclusions

  3. Motivation Coverage Measures Needed • Functional Memory Testing • A multitude of fault models and test schemes proposed. • Quality of fault coverage difficult to assess. • To evaluate and rank existing test algorithms: • Deterministic/regular tests. • Pseudo-random/irregular tests. • To validate new test schemes for: • Embedded memories and BIST designs. • Specialized memory architectures (e.g., multiport, FIFO).

  4. ... . . . . . . . . . . . . ... Functional Cell Array Model Bit-addressable 2-D array of binary storage elements: ... Operations: read, write-0, write-1.

  5. 1 / 0 Functional Fault Behavior • Sensitized/desensitized by write operations. • Detected by read operations. write Unsensitized Sensitized read Detected 0 / 1 write

  6. Cell Array Fault Models Single Cell stuck-at, transition, stuck-open, data-retention idempotent, inversion, state, dynamic (2-cell and 3-cell versions) Coupling AND-type, OR-type (2-cell and 3-cell versions) Bridging active, passive, static (type I and type II neighborhoods) Neighborhood Pattern Sensitive

  7. 1 0 0 1 0 1 . . . . . . 0 1 1 . . . . 0 1 sensitized fault . . mem. pattern write op. Fault Model Specification Fault models are specified as inputs, not hard-coded. Example Format sensitization < write op. > < mem. pattern > < write op. > < mem. pattern > desensitization < write op. > < mem. pattern > < write op. > < mem. pattern >

  8. Ex.: 2-cell OR-type Bridging Fault Operation a b sensitization write-1, a 0 0 write-1, b 0 0 a b write-0, a 1 1 write-0, b 1 1 read to either cell returns OR(a,b) desensitization write-0, a 1 0 write-0, b 0 1 write-1, a 0 1 write-1, b 1 0

  9. Coverage Analysis Simulation performed for arbitrary test sequences. case: write write-1, < add. > read, < add. > Determine which faults are sensitized or desensitized. write-0, < add. > write-1, < add. > case: read read, < add. > . . Classify all sensitized faults as covered. .

  10. faults in cells y , y , y , y sensitized by write operation 1 2 3 4 p 1 x p p y 1 4 2 p y y 2 4 y 3 transition in nbh. pattern p , p , p , p sensitizes fault 4 3 1 2 Sensitization & Desensitization A write operation can sensitize/desensitize several faults. Example active NPSF 3 3

  11. t . D t 1 1 1 1 1 1 D 1 0 1 1 1 1 1 1 1 1 1 1 Delayed State Transitions Sensitization/desensitization occur after a time delay Used to model retention faults, e.g., "sleeping-sickness" failures in DRAMS:

  12. CFid(x and z 0 0 1 x y z CFid(y and z 1 0 1 x y z CFid(x and y 0 1 CFid(y and z x y z Multiple Faults Error masking Multiple sensitizations

  13. 1 1 1 0 1 0 A C 1 1 0 B Multiple Faults (cont.) • Sensitized faults change the memory pattern. • This affects the sequence of sensitization/desensitization of other faults. Example no faults sensitized fault A sensitized fault B sensitized faults A and B sensitized 1 1 1 1 1 1 1 1 1 1 0 1 0 1 1 0 1 0 A C A C A C 1 1 1 1 1 1 1 1 0 B B B  the pattern surrounding cell C is all 1’s a sleeping-sickness fault is sensitized

  14. Complexity with respect to the test sequence length t NPSFs with respect to the neighborhood size k k-cell coupling faults with respect to the memory size n & number of coupled cells k NPSFs: cells in physical proximity. Coupling faults:cells located anywhere in memory array.

  15. 1 0 0 0 0 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Examples of Test Algorithms March X March C- GALPAT

  16. Fault Class FC (%) Fault Class FC (%) global 2-cell Type I NPSF CFid 50.0 Active 6.25 SCF 75.0 Passive 6.25 ABF 50.0 Static 15.6 local 3-cell Type II NPSF CFid 25.0 Active 0.39 SCF 100 Passive 0.39 ABF 50.0 Static 1.76 Simulation Results for March X 256-bit memory (16 rows x 16 columns)

  17. Fault Class FC (%) Fault Class FC (%) global 2-cell Type I NPSF CFid 100 Active 12.5 SCF 100 Passive 12.5 ABF 100 Static 31.2 local 3-cell Type II NPSF CFid 50.0 Active 0.78 SCF 100 Passive 0.78 ABF 100 Static 3.52 Simulation Results for March C- 256-bit memory (16 rows x 16 columns)

  18. Fault Class FC (%) Fault Class FC (%) global 2-cell Type I NPSF CFid 99.7 Active 11.7 SCF 100 Passive 15.6 ABF 100 Static 40.6 local 3-cell Type II NPSF CFid 48.2 Active 0.81 SCF 79.9 Passive 0.98 ABF 100 Static 4.10 Simulation Results for GALPAT 256-bit memory (16 rows x 16 columns)

  19. (local) (local) Trace of Simulation for ANPSF Test

  20. Conclusions • General RAM fault simulation methodology. • Library of over 25 functional fault models. • Coverage statistics for over 40 test algorithms. Application: • Evaluation of arithmetic BIST schemes for memories.

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