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CS 271 (Computer Architecture) Chapter 1: Introduction. CS 271 Computer Architecture Indiana University – Purdue University Fort Wayne. Introduction to computer architecture. Basic concept “Hardware and software are logically equivalent”
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CS 271 (Computer Architecture)Chapter 1: Introduction CS 271 Computer Architecture Indiana University – Purdue University Fort Wayne
Introduction to computer architecture • Basic concept • “Hardware and software are logically equivalent” • Any operation executed by some computer hardware can also be simulated in software • Any operation performed by software can be built directly into the hardware of a computer system • Note: hardware implementation might be very complicated or costly
Hardware computer system • Very fast • Typically has an instruction set consisting of simple operations • MOV • ADD • BZ • etc. • Machine language for the instruction set • Tedious to program • Programs consist of a sequence of bits
Virtual machine • Call raw computer hardware M0 and the instruction set L0 • A “virtual machine” is a hypothetical computer M1 whose machine language is L1 • More human oriented • May be too expensive or complicated to actually build directly in hardware • If so, L1 programs can still be written for M1 • However, such programs cannot be directly executed on M1
Translation • Translation makes L1 programs practical for computer systems that are too expensive to actually build in hardware • Any program written in L1 must . . . • either be “translated” to the L0 language prior to execution on M0 • or be “interpreted” by software written in L0 and running on M0
Translation • Translation is done by a compiler • A complier is an L0 program running on M0 that translates the L1 program to L0 • The compiler output later runs on M0 • Interpreter • An interpreter is an L0 program running on M0 • The interpreter translates and executes the L1 program instruction-by-instruction
Computer system • Layers of virtual machines stacked on raw hardware • Each virtual machine . . . • provides an instruction set • is translated to or interpreted by lower layers
Contemporary multilevel machine • Typical virtual machine levels • High-level-language (HLL) machine level • Assembly language machine level • Operating system machine level • Instruction set architecture (ISA) level • Microarchitecture level • Digital logic level • The digital logic level is hardware with transistors, wires, power supply, etc.
Evolution of multilevel machines • Three level architecture • ISA level • Microprogram level • Digital logic level • Concept due to Maurice Wilkes (1951, Cambridge) • Microprogram level • Interprets ISA instructions using the digital logic level • Very small instruction set • Easier to construct than ISA level • Built-in, unchangeable
Evolution of multilevel machines • Operating system level • Adds instructions and features to the ISA level • I/O instructions • System macros • Supervisor calls • Etc. • Added instructions are interpreted by the ISA level • ISA instructions are executed directly (interpreted by the microprogram level)
Evolution of multilevel machines • CISC (Complex Instruction Set Computer) • Golden age for microprogram level - 1960s and 1970s • Increasingly sophisticated microprogram level evolved • Instructions for floating point, procedure call/return, etc. • Execution became slower • RISC (Reduced Instruction Set Computer) • Eliminates the microprogram layer • Small instruction set is directly executed • Increased execution speed, but at a price • Remove Inconvenient Stuff to the Compiler
Computer generations 0th 1642 – 1945 Mechanical 1st 1945 – 1955 Vacuum tubes 2nd 1955 – 1965 Transistors 3rd 1965 – 1980 Integrated circuits 4th 1980 - VLSI, personal computers 5th 1970s - Invisible computers
Moore’s Law • The number of transistors on a chip doubles every 18 months • Gordon Moore (co-founder of Intel) – 1965 • Not a law of nature • Just an empirical observation • Exponential growth at the rate of 60% per year • Moore’s law has held from the 1960s until the present • Increase from 103 to 108 transistors per chip
Examples of computer architectures We will refer to these examples throughout the semester
Intel computer family Moore’s law for (Intel) CPU chips.
MCS-51 family Members of the MCS-51 family.
Metric units The principal metric prefixes.