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Potential thesis projects. Peter Gorm Larsen ( pgl@iha.dk ) Professor (ingeniørdocent) at Engineering College of Aarhus. Research Areas. Semantic clarifications combined with tool building Overture on top of Eclipse Open source community International angle
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Potential thesis projects Peter Gorm Larsen (pgl@iha.dk) Professor (ingeniørdocent) at Engineering College of Aarhus Potential thesis projects
Research Areas • Semantic clarifications combined with tool building • Overture on top of Eclipse • Open source community • International angle • Lots of students can experiment with deltas • Applications of new extensions for distributed real-time embedded systems • First project by Hugo Macedo on pacemaker • Rasmus Sørensen and Jasper Nygaard on CyberRail • “Existing” projects • SKATT (Sikrere og Klogere produkter gennem Anvendelse af Trådløs Teknologi) • MC-HA (Minimum Configuration – Home Automation) Potential thesis projects
Vienna Development Method • Invented at IBM’s labs in Vienna in the 70’s • VDM-SL and VDM++ • ISO Standardisation of VDM-SL • VDM++ is an object-oriented extension • Model-oriented specification: • Simple, abstract data types • Invariants to restrict membership • Implicit specification (pre/post) • Explicit specification (functional or imperative) Potential thesis projects
Overture versus VDMTools • VDMTools (http://www.vdmtools.jp/en) • Closed source, proprietary (available under NDA) • Monolithic architecture (single binary), C++ • Optimized for performance, industry strength • Overture Tool project (http://www.overturetool.org) • Open source, GPL license • Plug-in architecture, Eclipse, Java • Optimized for flexibility, targets academic use • (partly) developed using VDMTools Potential thesis projects
The Rose-VDM++ Link Document Generator Code Generators- C++, Java Syntax & Type Checker API (Corba), DL Facility Interpreter (Debugger) Integrity Checker Java to VDM++ VDMTools Overview Potential thesis projects
Connection to standard development environments Code Generators- C++, Java Reverse Engineering support JML coupling UML, SysML AADL Visualisation Support Overture Architecture Overview Validation support Basic automatic checks and GUI Refactoring support OML editor With syntax highlighting Syntax Check Type Check Interpreter (Debugger) With API capabilities Test Generation support AST Eclipse Visualization Support for Execution traces Verification support Pretty Printing With coverage Model Checking support Interactive Proof support Automatic Proof support Proof Obligation generation Currently draft available Ongoing Not yet available Potential thesis projects
modified java classes JAVA interfaces sed script ASTGEN sed VDM++ classes java classes VDMTools Automatic AST generation • specified in VDM++ • code generated “implements” OVERTURE AST spec (VDM-SL subset) other users can use these specs to specify their own OVERTURE extensions (in VDM++) Potential thesis projects
Support for language experiments • Generic recipe to follow: • Change the AST definition • Re-generate the AST (AstGen & VDMTools) • Modify the scanner / parser (jflex, byaccj) • Recompile java code • Turn-around time: • 2 hours (minor changes) • 1 day (larger changes) Potential thesis projects
Support for tool development (1) • The (preferred) VDM++ recipe • Take the AST VDM++ “interfaces” (IOml*) as is • Take VDM++ class “OmlVisitor” • Refactor (rename) this class • Specify the required functionality directly in VDM++ • Validate the specification using VDMTools • Generate the Java implementation using VDMTools • Compile and integrate into Eclipse plug-in Potential thesis projects
Support for tool development (2) • Alternate Java recipe • Take the AST Java interface classes • Take the OmlVisitor.java code template • Refactor (rename) this class • Write your tool directly in Java • Compile and integrate into Eclipse plug-in Potential thesis projects
The Active VDM Community • VDM Portal (http://www.vdmportal.org/) • The CSK VDM Group • The Overture Open-Source Initiative • On top of Eclipse platform (http://www.overturetool.org) • Regular net meetings • Academic collaboration • MSc theses: (DK) type checker (DK), interpreter (Portugal), proof support (NL), test automation (Portugal), JML combination (Portugal), proof obligation generation (Portugal) • Pacemaker grand challenge Potential thesis projects
The Pacemaker Challenge • A Safety-Critical Application • Report over project made by Hugo Macedo • 4 different models made in VDM • High-level VDM-SL model • Sequential VDM++ model • Concurrent VDM++ model • Real-time distributed VDM++ model • Follow VICE Guidelines + new validation conjectures over timed traces • http://www.cas.mcmaster.ca/sqrl/pacemaker.htm Potential thesis projects
Jasper Nygaard and Rasmus Sørensen Evaluating Distributed Architectures using VDM++ Real-Time modeling with a Proof Of Concept Implementation Potential thesis projects
Jasper and Rasmus MSc Results • VDM++, model and test large systems. • Repeater, JAVTU • VDM++ as an engineering tool. • Development process • Importance and ease of abstraction • Deployments Schemes • Communication Platform • Token Device, Technology • Distributed Architecture • Potential Bottlenecks • SMS Retry Algorithm. • Context Awareness MSc. Jasper Moltke Nygaard, 14th Jan 2008 – jasper@sovs.net Potential thesis projects
SKATT • Sikrere og Klogere produkter gennem Anvendelse af Trådløs Teknologi • Together with: • Alexandra • Grundfos • Skov • Adding wireless capability to existing products • A number of student projects have already been made: • AFP with LIAB application • AFP with Grundfos application • Multidisciplinært Ingeniørprojekt, (Skov) 3 MSc E-students Potential thesis projects
MC-HA • Minimum Configuration – Home Automation • Electronic gadgets enter private homes to • Improve comfort • Save energy • How to enable Mr and Mrs Jensen to set it up? • Different standards exists both for wired and wireless • Interoperability must be ensured by common easy configuration • New project application is underway Potential thesis projects