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Near and Long Term Challenges and Solutions for Low Power Energy Scavenging Applications. Rajeevan Amirtharajah University of California, Davis. Sensor Network Applications. Body-Area Networks. (Courtesy of ABB). (Courtesy of J. Guttag). * Hanson, Computer 2009.
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Near and Long Term Challenges and Solutions for Low Power Energy Scavenging Applications Rajeevan Amirtharajah University of California, Davis
Sensor Network Applications Body-Area Networks (Courtesy of ABB) (Courtesy of J. Guttag) *Hanson, Computer 2009 Wide-Area and Local-Area Networks (Courtesy of ARL)
Typical System Power Requirements • System works with low duty-cycle, total average power = 5 mW • ADC - requires low power and clean VDD • DSP - requires low power, noisy VDD ok • RF - requires high peak power
Commercial Wireless Sensor Products Crossbow IRIS mote, 2009 Ferro Solutions VEH-360 EH, 2009 • Vibration Energy Harvester • 10.8 mW peak @60Hz • Volume: 133cm3 • 3.3V Out with Integrated AC/DC Converter Wireless Sensor Mote • Volume (excl. batteries): 13cm3 • ~24mA active current draw • 2 AA batteries @1% Duty Cycle • <3 year lifetime and 14.74 cm3 • CR2025 battery @1% Duty Cycle • <1 month lifetime and 0.79 cm3
Solar Energy Harvesting • Typical solar cells based on crystalline silicon • Thin-films offer lower costs (amorphous Si, CdTe, etc.) • 10-40% efficient • Outdoors: 20mW/cm2 • Indoors: 20mW/cm2 • Integrate into standard CMOS Everlast Mote (Simjee and Chou ISLPED 06)
Common Vibration Sources Vibration Source Frequency of Peak (Hz) Peak Acceleration (m/s2) Kitchen Blender Casing 121 6.4 Clothes Dryer 121 3.5 Door Frame (just after door closes) 125 3 Small Microwave Oven 121 2.25 HVAC Vents in Office Building 60 0.2-1.5 Wooden Deck with People Walking 385 1.3 Bread Maker 121 1.03 External Windows (size 2ftx3ft) next to a Busy Street 100 0.7 Notebook Computer while CD is Being Read 75 0.6 Washing Machine 109 0.5 Second Story of Wood Frame Office Building 100 0.2 Courtesy P. Wright, UC Berkeley Refrigerator 240 0.1
Vibration Generator Mechanical Model Output Electrical Power • Second order mechanical system: spring + mass + dashpot • Driven by amplitude forcing function at resonance
Vibration to Electric Energy Converters Mesoscale Moving Coil MEMS Variable Capacitor • Estimated output power: 8.7 mW • Estimated output power: 400 mW Mesoscale Piezo Bender • Output power: 375 mW Courtesy P. Wright, UC Berkeley
Progress and Challenges • Many demonstrations of various energy scavenging modalities in last 15 years • Solar using photovoltaics • Temperature gradients using thermoelectrics • Vibration and movement using piezoelectrics, electromagnetics, and electrets • Near term challenges • Harnessing multiple modalities simultaneously and efficiently • Exploiting low energy sources: indoor solar, human movement • Long term challenge: scaling below 1mm3
Outline • Introduction • Multiple Input Energy Harvesting • System Miniaturization • Conclusions
Energy Scavenging Wireless Sensor • Extend sensor node lifetime beyond battery limitation • Scavenging energy from light, heat, and vibrations • Cope with the variability of the harvested power Energy scalable digital and mixed-signal processing
Integrated Photodiodes: Side View • Side view cutaway of integrated photodiode. Metal connected to p- and n- diffusions correspond to top and bottom capacitor plates, respectively
Diffraction Grating • Metal capacitors form optical notch filter • Resonant wavelength, (LO=950 nmLR =1550 nm)* • Vary duty-cycle, periodicity and grating depth to alter filtering effect *[H. Tan et al, A Tunable Subwavelength Resonant Grating Optical Filter, LEOS, 2002]
Side View of Example Photodiode • Space between metal is near 1 mm • Height between metal layers is 0.675 mm • Spatial duty cycle between metal width and spacing ~32% P+ P+ P+ P+ P+ • Varying metal heights reduces reflections and helps guide l light into depletion regions
Photodiode Die Photograph • 90nm CMOS • Six photodiode designs • D1- D6 • Same diffusion layout • Different metal diffraction gratings • Gratings can concentrate light • Improve indoor harvesting efficiency • Expand range of incident angles
Generated Power of D1 • Maximum power generation is a function of light intensity and load resistance, maximum power-point tracking desirable
Voc vs. Angle of Incidence D1 D4 • Polar plot • Green laser with l = 532 nm • Increased off-axis response with diffraction grating 17
Photodiode Comparison • 20 kLUX, 25 °C, active area (90nm) = 10000 mm • Area for 5 mW = 164 μm x 164 μm (0.35 mm), 124 μm x 124 μm (90 nm)
Multi-Electrode Piezoelectric Generator • Top plate divided into quarter-circle sections, bottom plate not divided, yielding 5 electrodes in total • PZT (lead zirconate titanate) disk diameter = 1.5” • Multiple mechanical resonances means more efficient harvesting from random or time-varying vibrations
Multiple Resonances with Cuts • Without cuts only mode near 1 kHz is usable • Simulated results from lumped model derived using rigid body analysis
Top Plate Waveforms • Traveling wave excites neighboring top plate signals with 90° relative phase shift
Rectifier Alternatives • Conventional (inductively loaded) rectifier [M. Ghovanloo, et al., JSSC Nov. 2004]
Full Wave Rectifier Prototype • Dashed outline: one CMOS controlled rectifier (CCR) • Snubbing diode used on each input for negative swings
Measured Efficiency Curves • Input frequency = 10 kHz
Rectifier Comparison • Previous rectifiers typically 76-90% efficient
Die Photograph • Constructed in 0.35 mm CMOS • PMOS power FET width = 500 mm • N. Guilar et al., ISSCC 2008, JSSC 2009
Multiple-Input Power Supply • AC/DC combines a rectified Vvibe with Vsolar • DC/DC further smoothes harvested energy to form Vout
Multiple-Input Power Supply Measured Output • DC/DC output controller switches between functional blocks • DSP tolerates high ripple, so the controller trades efficiency for ripple
Multiple-Input Power Supply Chip Photo • 0.25mm CMOS, total active area • N. Guilar et al., ISSCC 2009
Outline • Introduction • Multiple Input Energy Harvesting • System Miniaturization • Conclusions
180nm AC/DC System: Power and Volume 80 nW/mm3 1 MHz 16-bit 4-tap Filter in 180nm CMOS VDD = 1V 2.68 nJ/result AC/DC 84.1%† 39.8 cm3 PDSP = 2.68 mW *Area and volume does not included passive components for power electronics. † Guilar, ISSCC 2009
Ripple-Tolerant Low Power Digital Processor Digital circuits on AC supply avoids efficiency penalty of AC/DC Supply appears “DC” wrt digital clock: 60Hz-1kHz vs. 1MHz-100MHz AC supply design requires: Supply variation tolerant circuits, proper state initialization, memories 180nm CMOS 2.6mm x 2.6mm with 75.6 MHz self-timed clock @ 1.8V 60 Hz – 1 kHz supply frequency consumes 127 – 113 µW 2.68nJ per 16-bit 4-tap result in 180nm at 1V
AC Supply DRAM Retention Time • DRAM tolerates AC supply, retaining state when VDD = 0V • Required retention time increases as AC supply frequency decreases • Time between 400mV level crossings for 1.8V peak supply • 1.2ms at 60Hz • 72µs at 1kHz 34
High-Ripple Supply Tolerant Embedded Memory 180nm Logic Only Process 3T DRAM (M1-M3) stores data over supply cycles M1 has a W/L = 4.59 μm/9.9 μm and 300fF gate capacitance Single-ended reads and writes Measured retention times: 28ms @ 1.8V, 9.4ms @ 1V 35
180nm AC System: Power and Volume 80 nW/mm3 1 MHz 16-bit 4-tap Filter in 180nm CMOS VDD = 1V 2.68 nJ/result Rectifier 100%† 33.5 cm3 PDSP = 2.68 mW *Area and volume does not included passive components for power electronics. † Guilar, JSSC 2009
90nm AC System: Power and Volume 80 nW/mm3 1 MHz 16-bit 4-tap Filter in 90nm CMOS VDD = 0.5V 335 pJ/result Rectifier 100%† 4.18 cm3 PDSP = 335 µW *Area and volume does not included passive components for power electronics. † Guilar, JSSC 2009 37
3T DRAM Cell Scaled to 90nm • Vstore should reach a maximum value of VDD-Vth0 • At 1V VDD, Vstore reaches 732mV, not 553mV • Better than expected! What’s the catch? 38
90nm 3T DRAM Resistive Model • Gate leakage causes resistive behavior • Leakage reduces data retention time despite higher stored voltage 39
Architectural Exploration & Analysis for Leakage Energy Scalable Array (0.25 mm) Energy Scalable Array (20 nm) • Modified IntSim CAD tool (Sekar et al., ICCAD 07) to support architectural exploration for energy scalable reconfigurable signal processing arrays • Finished initial study using parameters from completed test chip in 0.25 mm CMOS • Leakage clearly dominant power component for energy harvesting applications at advanced technology nodes
Silicon Nanowires Among list of candidates for the eventual replacement of the planar CMOS transistor (ITRS) Vertical integration allows for dense arrays to be grown Applications to chemical sensing, solar cells, and photonics Transitional phase may include both planar CMOS and SiNW devices “CVD grown Si nanowires,” Public Domain, 2005 “Gold nanowire array,” Creative Commons SA 2.0 license, 2005
Nanowire Surround-Gate Vertical FET (VFET) V. Schmidt, et al. “Realization of a Silicon Nanowire Vertical Surround-Gate Field-Effect Transistor.” Small, Vol. 2 No. 1, (2006) 85-88
Hybrid CMOS-Nanowire Process VFET • VFET spans three metal layers, middle layer provides gate electrode • Dimensions set by via, metal rules in traditional CMOS process
Extracted Device Parameters: 90nm NMOS • Near-ideal subthreshold slope enables VFET to be used as super-cutoff switch for leakage control
Outline • Introduction • Multiple Input Energy Harvesting • System Miniaturization • Conclusions
Conclusions • Energy harvesting for wireless sensors has made progress by leveraging low performance demands • Near term challenges include combining multiple energy scavenger outputs and extracting sufficient power from “weak” sources • Long term challenges include scaling below 1mm3 while simultaneously managing leakage • Innovative transducers (integrated solar cells, 2D vibrating structures) and power electronics can help address these challenges • Using DRAM to exploit the AC nature of vibration energy harvesting can improve total system efficiency • Emerging devices such as nanowire VFETs offer new opportunities to extend energy harvesting in the future
Acknowledgments • Albert Chen • Jamie Collier • Erin Fong • Liping Guo • Nate Guilar • Travis Kleeburg • Prof. Stephen Lewis, UCD • Jeff Loo • Mackenzie Scott • Jeff Siebert • Justin Wenck • Prof. Paul Wright, UCB • Prof. Diego Yankelevich, UCD • Prof. Paul Hurst, UCD
Acknowledgments • National Science Foundation CAREER Award • FCRP Interconnect Focus Center • Xilinx University Program and Xilinx Research Labs • U.S. Dept. of Education GAANN Fellowship • The TSMC University Program
Thank You Rajeevan Amirtharajah ramirtha@ece.ucdavis.edu http://www.ece.ucdavis.edu/mcsg/