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THE VLBA DIGITAL BACKEND

This article discusses the use of FPGAs in the VLBA digital backend and provides resource estimates for implementing the requirements. It covers digital filters, current technology (Xilinx Virtex 5.65nm FPGAs), and various filter architectures.

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THE VLBA DIGITAL BACKEND

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  1. SUBSYSTEMS IN THE FPGA AND RESOURCE ESTIMATES THE VLBA DIGITAL BACKEND

  2. DIGITAL… • FPGAs are fast and cheap, and getting faster and cheaper. • Hardware block diagrams are starting to all look alike. Everything is moving into the FPGA.

  3. DIGATAL FILTERS • Are just arithmetic. • Limited in bandwidth (only) by the hardware they are implemented in. • Can require significant logic resources to implement.

  4. CAVEAT • The purpose of this exercise is to obtain a reasonable estimate of the resources required to implement the requirements of the VLBA DBE.

  5. MAIN VLBA REQUIREMENTS • Use the current RF/IF system. • 500 MHz BW from 500MHz to 1GHz • Re-implement the current baseband system digitally to obtain double the total current bandwidth. • Tunable base bands with selectable bandwidths.

  6. CURRENT TECHNOLOGY • Xilinx Virtex 5 65 nm FPGAs • Fastest speed grades up to 550 MHz clocks. • Astonishingly large (but sub-infinite) amount of logic and specialized DSP resources. • Very efficient at implementing... • Adders • Small ROMs • Random sequential logic • Hard limit on specialized resources (DSP,memory)

  7. DIRECT FORM FIR FILTER

  8. PIPELINED ADDER TREE

  9. TYPICAL IMPULSE RESPONSE

  10. SCALED IMPULSE RESPONSE

  11. POLYPHASE FIR FILTERS • Can process more bandwidth than Nyquist seems to allow. • Run at lower clock rate than the input data rate. • Impose restrictions on locations of pass bands and band edges.

  12. POLYPHASE ARCHITECTURE

  13. PROTOTYPE LPF RESPONSE

  14. DIGITAL DOWNCONVERTER

  15. DEC2 IMPULSE RESPONSE

  16. DECIMATION 2 FIR

  17. FREQUENCY RESPONSE

  18. WITH ALIASING BANDS

  19. FPGA RESOURCE ESTIMATE

  20. BOARD LEVEL BLOCK DIAGRAM

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