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Adders

Adders. Lecture L7.1 Section 7.1. Adders. Half Adder Full Adder TTL Adder. A . 0 . S . 0 . B . 0 . C . 1 . Half Adder. A . B . S . C . 0 . 0 . 0 . 1 . 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1. Dec Binary 1 1 +1 +1 2 10. Multiple-bit Addition.

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Adders

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  1. Adders Lecture L7.1 Section 7.1

  2. Adders • Half Adder • Full Adder • TTL Adder

  3. A 0 S 0 B 0 C 1 Half Adder A B S C 0 0 0 1 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 Dec Binary 1 1 +1 +1 2 10

  4. Multiple-bit Addition A3 A2 A1 A0 B3 B2 B1 B0 0 1 0 1 0 1 1 1 A B Ci+1 +Ci 0 1 0 1 0 1 1 1 1 1 1 Ai +Bi A B Si 1 1 0 0

  5. AiBi 00 01 11 10 Ci 0 1 Si Full Adder Ci Ai Bi Si Ci+1 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1

  6. Full Adder Ci Ai Bi Si Ci+1 Si = !Ci & !Ai & Bi # !Ci & Ai & !Bi # Ci & !Ai & !Bi # Ci & Ai & Bi 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1

  7. Full Adder Si = !Ci & !Ai & Bi # !Ci & Ai & !Bi # Ci & !Ai & !Bi # Ci & Ai & Bi Si = !Ci & (!Ai & Bi # Ai & !Bi) # Ci & (!Ai & !Bi # Ai & Bi) Si = !Ci & (Ai $ Bi) # Ci & !(Ai $ Bi) Si = Ci $ (Ai $ Bi)

  8. AiBi 00 01 11 10 Ci 0 1 Ci+1 Full Adder Ci Ai Bi Si Ci+1 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1

  9. AiBi 00 01 11 10 Ci 0 1 Full Adder Ci Ai Bi Si Ci+1 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 Ci+1 Ci+1 = Ai & Bi # Ci & Bi # Ci & Ai

  10. AiBi 00 01 11 10 Ci 0 1 Full Adder Ci Ai Bi Si Ci+1 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 Ci+1 Ci+1 = Ai & Bi # Ci & !Ai & Bi # Ci & Ai & !Bi

  11. Full Adder Ci+1 = Ai & Bi # Ci !Ai & Bi # Ci & Ai & !Bi Ci+1 = Ai & Bi # Ci & (!Ai & Bi # Ai & !Bi) Ci+1 = Ai & Bi # Ci & (Ai $ Bi) Recall: Si = Ci $ (Ai $ Bi) Ci+1 = Ai & Bi # Ci & (Ai $ Bi)

  12. Half-adder Half-adder Full Adder Si = Ci $ (Ai $ Bi) Ci+1 = Ai & Bi # Ci & (Ai $ Bi)

  13. Full Adder A full adder can be made from two half adders (plus an OR gate).

  14. Full Adder Block Diagram

  15. 4-Bit Adder C 1 1 1 0 A 0 1 0 1 B0 1 1 1 S 1 1 0 0

  16. adder.abl MODULE adder TITLE ‘4-Bit Adder' DECLARATIONS " INPUT PINS " A3..A0 PIN 11, 7, 6, 5; " Switch S6(1..4) A = [A3..A0]; " 4-bit operand B3..B0 PIN 4, 3, 2, 1; " Switch S7(1..4) B = [B3..B0]; " 4-bit addend " OUTPUT PINS " S3..S0 PIN 40, 41, 43, 44 ISTYPE 'com'; " LED 13..16 S = [S3..S0]; " 4-bit sum CF PIN 39 ISTYPE 'com'; " LED 12; carry flag OVF PIN 35 ISTYPE 'com'; " LED 9; overflow flag

  17. adder.abl (cont’d) " INTERMEDIATE NODES " C4..C0 NODEISTYPE 'com'; " internal carry vector Cin = [C3..C0]; " carry input vector Cout = [C4..C1]; " carry output vector Intermediate Carry bits

  18. adder.abl (cont’d) EQUATIONS C0 = 0; " zero carry in S = A $ B $ Cin; " sum output Cout = A & B # (A $ B) & Cin; " carry output vector CF = C4; " carry flag OVF = C4 $ C3; " overflow flag END adder4 Why? Si = Ci $ (Ai $ Bi) Ci+1 = Ai & Bi # Ci & (Ai $ Bi)

  19. Discard Sign Bits OVF OVF

  20. C4C3 A3 B3 10010 1001 = -7 1001 = -7 10010 = -14 discard 0010=2 Wrong => OVF 11100 1010 =-6 1111 =-1 11001 =-7 discard 1001=-7 Correct

  21. Carry and Overflow Binary 0 0 1 1 0 1 0 1 0 0 0 1 1 0 0 1 1 0 1 1 0 0 0 Dec Hex 35 +19 4E 53 +25 78 C = 0 O = 0 0 1 0 0 1 1 1 0 Note no carry from bit 6 to bit 7 and no carry from bit 7 to C.

  22. Note carry from bit 6 to bit 7 but no carry from bit 7 to C. Carry and Overflow Binary 0 0 1 1 0 1 0 1 0 1 0 1 1 0 1 1 1 1 1 1 1 1 1 Dec Hex 35 +5B 90 53 +91 144 C = 0 O = 1 1 0 0 1 0 0 0 0 Thinking SIGNED we added two positive numbers and got a negative result. This can’t be correct! Therefore, the OVERFLOW bit, O, is set to 1. Correct answer (144) is outside the range -128 to +127.

  23. Note carry from bit 6 to bit 7 and carry from bit 7 to C. Carry and Overflow Binary 0 0 1 1 0 1 0 1 1 1 0 1 0 0 1 1 1 1 1 1 0 1 1 Dec Hex 35 +D3 108 53 - 45 8 C = 1 O = 0 0 0 0 0 1 0 0 0 Ignore carry Thinking SIGNED we added a positive number to a negative number and got the correct positive answer. Therefore, the OVERFLOW bit, O, is cleared to 0. Correct answer (8) is inside the range -128 to +127.

  24. Note no carry from bit 6 to bit 7 but there is a carry from bit 7 to C. Carry and Overflow Binary 1 0 0 1 1 1 1 0 1 1 0 1 0 0 1 1 0 0 0 1 1 1 1 Dec Hex 9E +D3 171 - 98 - 45 - 143 C = 1 O = 1 0 1 1 1 0 0 0 1 Ignore carry Thinking SIGNED we added two negative numbers and got a positive answer. This must be wrong! Therefore, the OVERFLOW bit, O, is set to 1. Correct answer (-143) is outside the range -128 to +127.

  25. Overflow • Note that the overflow bit was set whenever we had a carry from bit 6 to bit 7, but no carry from bit 7 to C. • It was also set when we had a carry from bit 7 to C, but no carry from bit 6 to bit 7. • Upshot: The overflow bit is the EXCLUSIVE-OR of a carry from bit 6 to bit 7 and a carry from bit 7 to C.

  26. 1 16 S2 Vcc 2 15 B2 B3 3 14 A2 A3 4 13 S1 S3 5 12 A1 A4 6 11 B1 B4 7 10 C0 S4 8 9 GND C4 74LS283 TTL Adder

  27. Question Add the following 8-bit binary numbers 10110110 01101111 What is the answer in hex? Was there a net carry? Was there an overflow?

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