120 likes | 200 Views
Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs) Submission Title: 3-level AM DSBSC High-rate Data Modulation Date Submitted: 12 July 04 Source: Chandos A. Rypinski Company: not affiliated Address 130 Stewart Drive, Tiburon, CA 94920 USA
E N D
Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs) Submission Title:3-level AM DSBSC High-rate Data Modulation Date Submitted: 12 July 04 Source:Chandos A. Rypinski Company: not affiliated Address 130 Stewart Drive, Tiburon, CA 94920 USA Mail: Voice: +1 415 435 0642 FAX: none, E-Mail: chanryp@sbcglobal.net Re: Possible PHY modulation for 802.15.3c. Describes 3-Level Double Side Band Amplitude Modulation on with Suppressed Carrier with switched half-sine pulse Purpose: Committee may consider this modulation as an alternative to BPSK, 4-QAM, or OQPSK. Notice: This document has been prepared to assist the IEEE P802.15. It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor acknowledges and accepts that this contribution becomes the property of IEEE and may be made publicly available by P802.15. Chandos Rypinski
3-level AM DSBSC High-rate Data Modulation Chandos A. Rypinski, consultant With Bob Ritter and John Arminini 12 July 2004 Chandos Rypinski
Summary • A different digital modulation technique is recommended to as an alternative to BPSK and OQPSK for short-reach, very high data rate UWB personal area networks. These applications are distinguished from narrow band systems because a higher level of side lobes is acceptable. • The recommended baseband modulation is DSBSC (double-sideband suppressed carrier) with three amplitude levels. This modulation enables homodyne receivers with I-Q demodulator working at a lower signal level. It is thought to be an excellent trade-off between complexity of implementation and performance. Chandos Rypinski
Advantages and Differentiation (1) • Zero dc and reduced low frequency energy density below 10% of the high edge frequency of the power density spectrum. This modulation enables homodyne receivers with I-Q demodulator working at a low signal level. • In the context of UWB, higher rejection for strong out-of-band signals is achievable by moving channel selectivity closer in level to the antenna. • Relatively fast acquisition for AGC setting and synchronization of the bit-clock. Chandos Rypinski
Advantages and Differentiation (2) • Independence of rf phase or frequency at demodulation provides decreased susceptibility to phase reversal errors with frequency/time domain fades. • With specified channel coding, half the bits are 0's transmitted at zero amplitude enabling 1's to be transmitted at twice the average power allowed for BPSK. • This baseband waveform will pass through Category 5 copper pairs for substantial distances without equalizers. Chandos Rypinski
Figure 1 Isolated pulse for one-bit sine-wave and sym-pulse Figure 2 Power density spectrum for sine-wave and sym-pulse isolated pulses Compare isolated “Sym-pulse” and sine pulses Chandos Rypinski
Serial bit stream using concatenated sine pulses Chandos Rypinski
Estimating Occupied Bandwidth for Sine Pulse The video waveforms shown above may be converted to DSB-SC radio frequency with a diode ring mixer in which the LO is the new carrier frequency and the video is the linear signal at the IF port. For 3-level am video: 0.04 to 0.9 times bit/chip rate for -18 dB at edges For 3-level DSB-SC: 1.8 times bit/chip rate for -18 dB at edges Example: For 100 Mbps, the video bandwidth is about 4 to 90 MHz, and the radio bandwidth is about 180 MHz at -18 dB down at edge and beyond. Chandos Rypinski
Receiver data demodulation (1) • At signal or intermediate frequency, an I-Q demodulator with local oscillator reduces the signal to baseband video • Each channel is squared and the result added implementing the identity sin²(θ)+cos²(θ) = 1. The sum is proportional to the power amplitude of the signal independently of the phase and frequency of the LO. • The peak amplitude of this signal is used for feed back AGC regulating the signal to within a few dB. Chandos Rypinski
Receiver data demodulation (2) • The approximately regulated signal is measured continuously for peak value. The threshold for a data comparator is set at a fixed fraction (near 70%). • The amplitude is integrated over the center half of the bit interval, and the value is determined by the comparator at the end of the integration interval. A data value of 1 or 0 is then available for the current bit. • This circuit requires known bit clock timing which is established during the burst preamble. Chandos Rypinski
Limitations on Maximum Rate • The present ASIC’s used for the receive vector demodulator and for the “squaring” circuit may limit speed to 50 Mbps. Faster circuits could be implemented with diode ring mixers and more components. • Because flat delay across the passband is needed, analog filters are limited in available selectivity. • Because of sampling at 4-5 times bit rate, the implementation is difficult for FIR filters. Chandos Rypinski
Recommendation The described modulation is recommended for use with mmWave radio transmission because it will ease many implementation problems, survive various types of propagation degradation and its processing at high speed will require less power than mathematical methods. Chandos Rypinski Chandos Rypinski