1 / 7

Instruction Set Overview

Instruction Set Overview. CLRA, CLRB. Chart from pg 483 of textbook Note: OpCode, Number of bytes, cycles to execute Note: Sets & Resets some condition codes. DECA, DECB, DEC memory (pg 483). Dec memory supports different addressing modes:

aliza
Download Presentation

Instruction Set Overview

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Instruction Set Overview

  2. CLRA, CLRB • Chart from pg 483 of textbook • Note: OpCode, Number of bytes, cycles to execute • Note: Sets & Resets some condition codes

  3. DECA, DECB, DEC memory (pg 483) Dec memory supports different addressing modes: EXT means Extended – the entire 16-bit memory address is included in the instruction IND, X - Indexed Addressing (pg 75), using the X index register, and an 8-bit offset to create the effective address. Note the number of additional cycles required: the memory must be loaded, decremented and stored back to memory. This shows that our microcontroller is a CISC computer.

  4. Load Instructions LDAA & LDAB load memory to 8-bit registers. Multiple addressing modes: IMM – Immediate, load a constant DIR – Direct Addressing, uses an address, but the upper byte is always 00 – so is usable only for a small range of memory.

  5. STAA, STAB, STD

  6. ANDA, ANDB

More Related