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Transistor Circuit DC Bias Part 1. ENGI 242. DC Biasing Circuits. Fixed-Bias Circuit Emitter-Stabilized Bias Circuit Collector-Emitter Loop Voltage Divider Bias Circuit DC Bias with Voltage Feedback Miscellaneous Bias Circuits. Maximum Power Curve. Fixed-Bias Circuit.
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Transistor Circuit DC BiasPart 1 ENGI 242
DC Biasing Circuits • Fixed-Bias Circuit • Emitter-Stabilized Bias Circuit • Collector-Emitter Loop • Voltage Divider Bias Circuit • DC Bias with Voltage Feedback • Miscellaneous Bias Circuits ENGI 242
Maximum Power Curve ENGI 242
Fixed-Bias Circuit ENGI 242
DC Equivalent circuit ENGI 242
Base-Emitter (Input) Loop Using Kirchoff’s voltage law: – VCC + IBRB + VBE = 0 Solving for IB: ENGI 242
Collector-Emitter (Output) Loop Since: IC = IB Using Kirchoff’s voltage law: VCE – VCC – IC RC Because: VCE = VC - VE Since VE = 0V, then: VC = VCE Also: VBE = VB - VE with VE = 0V, then: VB = VBE ENGI 242
BJT Saturation Regions When the transistor is operating in the Saturation Region, the transistor is conducting at maximum collector current (based on the resistances in the output circuit, not the spec sheet value) such that: ENGI 242
Determining Icsat ENGI 242
Load Line Analysis ENGI 242
Load Line Analysis • The end points of the line are : ICsat and VCEcutoff • For load line analysis, use VCE = 0 for ICSAT, and IC = 0 for VCEcutoff • ICsat: • VCEcutoff: • Where IB intersects with the load line we have the Q point • Q-point is the particular operating point: • Value of RB • Sets the value of IB • Where IB and Load Line intersect • Sets the values of VCE and IC. ENGI 242
Circuit values effect Q-point ENGI 242
DC Fixed Bias Circuit Example ENGI 242
Load-line analysis ENGI 242
Fixed-bias load line ENGI 242
Example ENGI 242
Emitter-Stabilized Bias Circuit Adding a resistor to the emitter circuit (between the emitter lead and ground) stabilizes the bias circuit ENGI 242
Improved Bias Stability • The addition of RE to the Emitter improves the stability of a transistor • Stability refers to a bias circuit in which the currents and voltages will remain fairly constant for a wide range of temperatures and transistor forward current gain () • The temperature surrounding the transistor circuit is not always constant • Therefore, the transistor is not a constant value ENGI 242
Base-Emitter Loop ENGI 242
Equivalent Network ENGI 242
Reflected Input impedance of RE ENGI 242
Base-Emitter Loop Applying Kirchoffs voltage law: - VCC + IB RB + VBE +IE RE = 0 Since: IE = ( + 1) IB We can write: - VCC + IB RB + VBE + ( + 1) IBRE = 0 Grouping terms and solving for IB: Or we could solve for IE with: ENGI 242
Collector-Emitter Loop ENGI 242
Collector-Emitter Loop Applying Kirchoff’s voltage law: - VCC + IC RC + VCE + IE RE = 0 Assuming that IE IC and solving for VCE: IC =VCC – VCE – (RE + RC) Solve for VE: VE = IE RE Solve for VC: VC = VCC - IC RC or VC = VCE + IE RE Solve for VB: VB = VCC - IB RB or VB = VBE + IE RE ENGI 242
Transistor Saturation At saturation, VCE is at a minimum We will find the value VCEsat = 0.2V For load line analysis, we use VCE = 0 To solve for ICSAT, use the output KVL equation: ENGI 242
Load Line Analysis The load line end points can be calculated: At cutoff: At saturation: ENGI 242