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EE5342 – Semiconductor Device Modeling and Characterization Lecture 10a Spring 2010. Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/. SPICE Diode Model. Dinj N~1, rd~N*Vt/iD rd*Cd = TT = Cdepl given by CJO, VJ and M Drec N~2, rd~N*Vt/iD rd*Cd: none Cdepl: none. t.
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EE5342 – Semiconductor Device Modeling and CharacterizationLecture 10aSpring 2010 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/
SPICE DiodeModel • Dinj • N~1, rd~N*Vt/iD • rd*Cd = TT = • Cdepl given by CJO, VJ and M • Drec • N~2, rd~N*Vt/iD • rd*Cd: none • Cdepl: none t va vd
TasksThe first draft is due 2/22/10 • Using PSpice or any simulator, plot the i-v curve for this diode, assuming Rth = 0, for several temperatures in the range 300 K < TEMP = TAMB < 304 K. • Using this data, determine what the i-v plot would be for Rth = 500 K/W. • Using this data, determine the maximum operating temperature for which the diode conductance is within 1% of the Rth = 0 value at 300 K. • Do the same for a 10% tolerance. • Propose a SPICE macro which would give the Rth = 500 K/W i-v relationship.