1 / 40

Image sensor CMOS rene.beuchatepfl.ch LAP-EPFL rene.beuchathesge.ch LSN-EIG-HESSO

RB - 2005/2007. 2. CMOS Image sensors. CMOS Sensors : Integrated, low-power devices with high image quality. Interline CCD : Progressive scan sensors with electronic shutter for real-time imaging. Full Frame CCD Low noise, high sensitivity imagers for a variety of applications. Linear CCD: High performance monochrome and trilinear (RGB) arrays..

andrew
Download Presentation

Image sensor CMOS rene.beuchatepfl.ch LAP-EPFL rene.beuchathesge.ch LSN-EIG-HESSO

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

    1. RB - 2005/2007 1 Image sensor CMOS rene.beuchat@epfl.ch LAP-EPFL rene.beuchat@hesge.ch LSN-EIG-HESSO

    2. RB - 2005/2007 2 CMOS Image sensors CMOS Sensors : Integrated, low-power devices with high image quality. Interline CCD : Progressive scan sensors with electronic shutter for real-time imaging. Full Frame CCD Low noise, high sensitivity imagers for a variety of applications. Linear CCD: High performance monochrome and trilinear (RGB) arrays.

    3. RB - 2005/2007 3 CMOS Image sensors Example : Kodak Family Image Sensor National Semiconductor ? Kodak transfer Low cost N/B or color 128 x 101 (580 frames/s) ? 2592 x 1944 pixels (6 frames/s)

    4. RB - 2005/2007 4 CMOS Image sensors (ex. Kodak Family)

    5. RB - 2005/2007 5 BW CMOS sensor

    6. RB - 2005/2007 6 LM9627, CMOS color sensor

    7. RB - 2005/2007 7 LM9630, B/W

    8. RB - 2005/2007 8 LM9638, couleur

    9. RB - 2005/2007 9

    10. RB - 2005/2007 10

    11. RB - 2005/2007 11

    12. RB - 2005/2007 12

    13. RB - 2005/2007 13 LM9630 main characteristics

    14. RB - 2005/2007 14 Module 9630

    15. RB - 2005/2007 15 Module 9638

    16. RB - 2005/2007 16 Orientation du capteur

    17. RB - 2005/2007 17 Color Mosaic

    18. RB - 2005/2007 18 Color Mosaic

    19. RB - 2005/2007 19 R'G'B' conversion

    20. RB - 2005/2007 20 R'G'B' ? YCrCb

    21. RB - 2005/2007 21

    22. RB - 2005/2007 22

    23. RB - 2005/2007 23

    24. RB - 2005/2007 24

    25. RB - 2005/2007 25

    26. RB - 2005/2007 26 Row scanning

    27. RB - 2005/2007 27 Windowing

    28. RB - 2005/2007 28 Sensor Reading

    29. RB - 2005/2007 29 Video signals

    30. RB - 2005/2007 30 Internal registers transfer by i2c

    31. RB - 2005/2007 31 Configuration by i2c

    32. RB - 2005/2007 32 Small camera interface laboratory project USB interface to FPGA FPGA for camera control and transfers Sensor ? FPGA ? Memory Memory ? FPGA ? USB FIFO (FX2) FX2 ? PC

    33. RB - 2005/2007 33 Data Flow

    34. RB - 2005/2007 34 FPGA architecture

    35. RB - 2005/2007 35 Camera Controller architecture

    36. RB - 2005/2007 36 Camera Interface, signals Camera interface : Mclk Cam_Mclk HSync Cam_HSync VSync Cam_VSync CamData[7..0] Cam_data[7..0] CamReset_n Cam_Reset_n Slave interface ? interface programmation Clk Clk Address AS_Address[2..0] CSelect AS_Cs_n Write AS_Write_n DataWrite[31..0] AS_Datawr[31..0] Read AS_Read_n DataRead[31..0] AS_Datard[31..0] InterruptRequest AS_IRQ_n Master interface ? Data transfers to memory : Clk Clk Address [31..0] AM_Address[31..0] ByteEnable_n[3..0] AM_ByteEnable_n[3..0] Write AM_Write_n DataWrite[31..0] AM_Datawr[31..0] WaitRequest AM_WaitRequest

    37. RB - 2005/2007 37 Camera Interface symbol

    38. RB - 2005/2007 38 Camera Interface, internal registers

    39. RB - 2005/2007 39 Clk extraction-synchronisation

    40. RB - 2005/2007 40 Work to do… Analysis and realization of the camera interface Avalon Slave, registers interface R/W Avalon Master, master of transfers in memory Camera data transfers : Clock synchronization from external data/signals Data assembly 4 * 8 ? 32 bits Data synchronization ? Avalon master VHDL Module simulation System on FPGA realization Integration in FPGA4U system (FX2, SDRAM, …)

More Related