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Introduction to Paging: Virtualize Memory Efficiently

Learn about paging as an approach to virtualize memory, advantages & disadvantages, address translation, page table structure, and memory trace using paging.

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Introduction to Paging: Virtualize Memory Efficiently

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  1. Paging: Introduction Hanul Sung (husung@dcslab.snu.ac.kr) School of Computer Science and Engineering Seoul National University

  2. Contents Introduction of paging Page table Address translation Contents of the Page table entry Memory trace Summary

  3. Introduction Question Q1: How to virtualize memory with pages? Q2: How can we virtualize memory with pages, so as to avoid the problems of segmentation? • Two approaches to solve a space-management problem • Segmentation • Split a process’s address space into some number of variable-sized pieces • Paging • Split a process’s address space into some number of fixed-sized pieces

  4. How To Virtualize Memory With Pages • Paging approach • Fixed-sized units called a page in virtual address space, a page frame in physical address space • Pages are placed at different locations throughout physical memory • Non-logical page frames unlike segmentation approach • Advantages of the paging • Flexibility • To support abstraction of an address space effectively • Regardless of how a process uses the address space • e.g. heap, stack • Simplicity • To manage a free-space easily • A freelist of all free pages Virtual Address Space Physical Address Space

  5. How To Store Address Translation Virtual Address Space Physical Address Space Page Table • Page table • To record where each virtual page is paced in physical memory • Address-translation • Per-process structure

  6. How To Perform An Address Translation VPN offset

  7. Address Translation Example VPN offset movl 21, %eax Address Translation offset PFN Page Table • A virtual address is translated into a physical address • The virtual address “21” is on the 5th(0101th) byte of virtual page “01” • Physical page frame number is 7 (111) in the page table previous page • Offset is not translated

  8. Where Are Page Tables Stored? 0 16 32 48 64 80 96 112 128

  9. What’s Actually In The Page Table? 31 1 0 3 5 4 2 6 7 12 8 PS A P R/W G D PWT U/S PCD An x86 Page Table Entry • Contents of each Page table entries (PTE) • Page frame number • Present bit (Valid bit) • Indicating whether this page is in physical memory or not • Read/Write bit (Protection bit) • To determine if writes are allowed to this page • User/supervisor bit • To determine if user-mode processes can access the page • Accessed bit (Reference bit) • Indicating whether this page has been accessed or not • Dirty bit • Indicating whether this page has been modified or not

  10. Paging: Also Too Slow // Extract the VPN form the virtual address VPN = (VirtualAddress & VPN_MASK) >> SHIFT //Form the address of the page-table entry PTEAddr = PTBR + (VPN * sizeof (PTE)) //Check if process can access the page if (PTE.Valid == False) RaiseException (SEGMENTATION_FAULT) else if (Can Access (PTE.protectBits) == False) RaiseException (PROTECTION_FAULT) else //Access is OK: form physical address and fetch it offset = VirtualAddress & OFFSET_MASK PhysAddr = (PTE.PFN << PFN_SHIFT) | offset Register = AccessMemory (PhysAddr) movl 21, %eax • An extra memory reference is required by paging • In order to fetch the translation from the page table for every memory reference

  11. A Memory Trace int array[1000]; … for (i = 0; i < 1000; i++) array[i] = 0; move the value zero into the virtual memory address of the location of the array %edi : the base address of the array %eax : array index (i) movl $0x0, (%edi, %eax, 4) incl %eax cmpl $0x03e8, %eax jne 0x1024 increment the array index held in %eax compare the contents of register to the 0x03e8 (1000) jump back to the top of the loop if the comparison shows that two values are not equal • A simple memory access example • To demonstrate all of the resulting memory accesses that occur when using paging

  12. A Memory Trace (cont’d) int array[1000]; … for (i = 0; i < 1000; i++) array[i] = 0; For arrays For instructions • There are 10 memory accesses per loop • 4 instruction fetches • 1 update of memory • 4 page table accesses to translate those 4 fetches • 1 page table access to translate 1 update of memory

  13. Summary • Paging is a solution for virtualizing memory • Advantages • No external segmentation • Flexibility and simplicity • Disadvantages • Many extra memory accesses • Memory waste

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