By Tariq Bashir Ahmad

1. Taylor Expansion Diagrams (TED) By Tariq Bashir Ahmad Adapted from the paper M. Ciesielski, P. Kalla, Z. Zeng, B. Rouzeyre,”Taylor Expansion Diagrams:A Compact Canonical Representation for Symbolic Verification”, in DATE, 2002.

2. Presentation Structure • Motivation – RTL verification • Background • BDD (binary), BMD (word-level) • New canonical representation: TED • Construction and manipulation • Properties • Applications ECE 697B Spring 2006

3. + + B 1 0 * * - - A F 0 1 B > A F ak s D <= bk ak s D bk Motivation – RTL Verification • Complex RTL designs • Data flow and control • Arithmetic and Boolean • Equivalence verification • Need representation that can handle arithmetic/Boolean • Efficient, compact • Canonical ECE 697B Spring 2006

4. Levels of Abstraction F (*) A C B A[n:0], B[n:0],C[2n:0] C = A*B A[1:0], B[1:0],C[3:0] C = A1•B1*22 +A1•B0*2 +A0•B1*2 +A0•B0 We can design at a higher level of abstraction, Can we verify at a higher level of abstraction ? ECE 697B Spring 2006

5. Common Representations • Boolean functions ( f : B  B ) • Truth table, Karnaugh map • SoP, PoS etc. • Binary Decision diagrams (BDD) • Arithmetic functions ( f : B  Int ) • Binary Moment Diagrams (BMD) • Need more abstract representation for arithmetic functions (f : Int  Int ) ECE 697B Spring 2006

6. Binary Decision Diagrams (BDD) f x fx’ fx • Based on recursive Shannon expansion: f = x fx + x’ fx’ where:fx = f(x=1), fx’=f(x=0) • Compact data structure for Boolean logic • Canonical representation • reduced ordered BDDs (ROBDD) • Essential for verification • equivalence checking, satisfiability (SAT) ECE 697B Spring 2006

7. Application to Verification a a b b c c 0 0 1 1 • Canonicity: equivalence checking of logic circuits F = a’bc + abc +ab’c G = (a+b)c  • Limitations • Require bit-level expansion of word-level variables • Size explosion for some functions (arithmetic) ECE 697B Spring 2006

8. Binary Moment Diagrams (BMD) • Devised for word-level, arithmetic operations • Based on modified Shannon expansion (pos. Davio) f = x fx + x’ fx’ = x fx + (1-x) fx’ = fx’ + x (fx - fx’ ) = fx’ + x fx where fx’ = fx=0is zero moment f x = (fx - fx’ ) is first moment (derivative) ECE 697B Spring 2006

9. BMD Example 4 2 4 1 2 1 4 4 0 0 1 1 x0 x2 x1 x0 x2 x1 y1 y0 y2 y1 y0 y2 2 2 1 1 • Efficiently models word-level operators X + Y =X2x1x0 + y2y1y0 =0 1 1 + 1 0 1 = 8 X Y =X2x1x0 . y2y1y0 =0 1 1 . 1 0 1 = 15 • Limitation: requires bit-level representation of a word ECE 697B Spring 2006

10. Symbolic Representation X + Y X Y 4 2 4 1 2 1 4 4 0 0 0 0 1 1 1 1 x1 x0 x1 x2 x0 x2 y0 y1 y1 y2 y2 y0 X X Y Y 2 2 1 1 Symbolic Symbolic Word level Word level • Why expand words into bits? Can we do better? • Abstract words into symbolic variables ECE 697B Spring 2006

11. Taylor Expansion Diagram(TED) F(x) x … F1(x) F0(x) F2(x) • F = arithmetic function (F : Int  Int ) • Treat F as a continuous function • Taylor Expansion (around x=0): F(x) = F(0) + x F’(0) + ½ x2 F’’(0) + … • Notation • F0(x) = F(x=0) 0-child - - - - - - • F1(x) = F’(x=0) 1-child ---------- • F2(x) = ½ F’’(x=0) 2-child ====== … So • F(x) = F0(x)+ x F1(x) + x2 F2(x) + … ECE 697B Spring 2006

12. Construction of TED example F0(A) =F|A=0 = 2C + 3 F1(A) =F’|A=0 = 2AB|A=0 = 0 C B A C A B F2(A) =½ F’’|A=0 = B B B0 = B(0) = 0 B1=B’= 1 0 2 3 1 G0(C) = (2C+3)|C=0 = 3 G1(C) = (2C+3)’= 2 F = A2B + 2C + 3 with order A<B<C G= 2C + 3 (without normalization) ECE 697B Spring 2006

13. Few more examples (A+B)(A+2C) (A+B)C +1 A B B A B 1 2 C C 0 0 1 1 1 ECE 697B Spring 2006

14. TED Reduction Rules f A a A 1 1 6 6 5 g 5 B B B B b C C C C g 1 0 1 1 0 0 1 0 b • 1. Eliminate redundant nodes: • Nodes with all edges  0 • Nodes with only constant term • f = 0 a2 + 0 a + g(b) = g(b) 2. Merge isomorphic subgraphs (A2 + 5A + 6)(B + C) ECE 697B Spring 2006

15. TED Normalization B B A A 2 6 1 2 2 A 1 2 1 3 2 B 3 1 0 1 • TED can be normalized • weights of edges of a given node must be relativelyprime (to allow sharing isomorphic graphs) 2A + 2B + 6 2(A + B + 3) ECE 697B Spring 2006

16. TED Composition h = f OP g z OP OP= (+, - , •) f g u x y q v • Recursive composition of nodes, starting at the top = • Operation depends on relative order of variables x, y • if x = y, then z = x, and h(x) = f(x) OP g(x) = f0(x) OP g0(y) + x [f1(x) OP g1(y)] + x2[f2(x) OP g2], … • if x > y, then z = x, and h(x) = f0(x) OP g(y) + x [f1(x) OP g(y)] + x2[f2(x) OP g], … • else …. ECE 697B Spring 2006

17. COMPOSE Operator – ADD/SUB x x x u v u + v = + u0+v0 u1+v1 u0 u1 v0 v1 x y x u u + v v = + u0+ v u0 u1 v0 v1 u1 • Nodes indexed by same variable • Nodes indexed by different variable (x > y) ECE 697B Spring 2006

18. Compose Operation Example A+B A+2C A A A A B C 4 6 4+6 3+5 0+5 3 5 1 1 0 0 2 1+1 1 2 1 0+0 B 2 C 1 2 B = + C 2A+B+2C ECE 697B Spring 2006

19. Comparison of BDD and TED ECE 697B Spring 2006

20. TED for Arithmetic Circuits B + A F1 Ahi Alo 1 0 * - Ahi ak s1 D > bk 2(k+1) ak 2k Alo s1 = ak (1-bk) 1 0 • Arithmetic circuits contain related word-level (A, B) and Boolean (ak, bk) variables A = [ an-1, …, ak , …,a0 ] = 2(k+1)Ahi + 2k ak + Alo ECE 697B Spring 2006

21. Application to RTL Verification B A + * F2 A F1 - 1 0 * 0 1 B - * D s2 ak s1 ak D > bk bk • Equivalence checking with TEDs • interacting word-level and Boolean variables F2 = (1-s2) (A2-B2) + s2 D s2 = ak’ bk = 1 - ak + ak bk F1 = s1(A+B)(A-B) + (1-s1)D s1 = (ak > bk) = ak (1-bk) A = [Ahi,ak,Alo], B = [Bhi,bk,Blo] ECE 697B Spring 2006

22. Result: RTL Verification F1 = F2 -1 -1 22k+2 2k+2 Blo Alo Ahi Alo ak ak bk bk 1 0 1 1 2k 1 D -22k+2 -2k+2 Bhi 2k+1 2k • Related word-level and Boolean variables F1 = s1(A+B)(A-B) + (1-s1)D s1 = (ak > bk) = ak (1-bk) F1 = (ak-akbk){ (2k+1Ahi + 2kak +Alo)2 - (2k+1Bhi + 2k bk + Blo)2 } + (1–ak + akbk) D ECE 697B Spring 2006

23. Questions? ECE 697B Spring 2006