130 likes | 257 Views
Voltage Translation Clamps. Standard Logic. ASIA MARKETING DEVELOPMENT Samuel Lin s-lin9@ti.com. 2012/Q1. Advantage With Voltage Clamp. High Speed Translation Direction Control Unnecessary Low Ron for less distortion With 5V Supply, it can level shift 1V to 5V range on the Input/Outputs
E N D
Voltage Translation Clamps Standard Logic ASIA MARKETING DEVELOPMENT Samuel Lin s-lin9@ti.com 2012/Q1
Advantage With Voltage Clamp • High Speed Translation • Direction Control Unnecessary • Low Ron for less distortion • With 5V Supply, it can level shift 1V to 5V range on the Input/Outputs • Bi-directional I2C™ Translation. • GTL to TTL/LVTTL Translation • Open Drain/Push Pull Interface
TVC Structures #1 VCC=5V 200k A IO : non-open drain B IO : non-open drain VREF A1 B1 VPullup Output 0 V to VREF(no pullup) 0V to Vpullup(pull up) Input 0 V to VREF(no pullup) 0 V to Vpullup(pull up) Input: 0V to 5V Output 0V to VREF(no pullup) A2 B2
TVC Structures #2 VCC=5V 200k A I/O : non-open drain B I/O : open drain VREF A1 B1 VPullup Output 0 V to Vpullup Input 0 V to Vpullup Input: 0V to 5V Output 0V to VREF A2 B2
TVC Structures #3 VCC=5V 200k A I/O : open drain B I/O : non-open drain VREF A1 B1 VPullup Vref Output 0 V to VREF(no pullup) 0V to Vpullup(pull up) Input 0 V to VREF(no pullup) 0 V to Vpullup(pull up) Input: 0V to VREF Output 0V to VREF A2 B2
TVC Structures #4 VCC=5V 200k A I/O : open drain B I/O : open drain VREF A1 B1 VPullup Vref Output 0 V to Vpullup Input 0 V to Vpullup Input: 0V to VREF Output 0V to VREF A2 B2
Typical Design Examples • Passive Bi-Directional Translator Clamps. • Pin “Gate” must use 200k Pull Up to Vcc, which must be higher than VREF minimum 1V to turn on the FET. • VREF would cut-off all A-Port Output to maximum level. • A-Port has 5V input tolerant,need pull up • when open drain • B-Port is flexible to desired Logic Voltage Level which depends on pull up Vcc.
Example of Unique Up Translator VCC=3.3V VCC=3.3V 200k 200k 1.2V 1.2V A1 B1 A1 B1 Clamp to 3.3V 3.3V 1.2V 1.2V 3.3V A2 CMOS LOGIC B2 A2 OPEN DRAIN B2 1.2V CMOS to 3.3V CMOS/Open DRAIN 1.2V CMOS to 3.3V CMOS
Example of Unique Down Translator VCC=3.3V VCC=3.3V 200k 200k 1.2V 1.2V A1 B1 A1 B1 3.3V 3.3V Clamp to 1.2V 1.2V 3.3V A2 CMOS LOGIC B2 A2 OPEN DRAIN B2