170 likes | 332 Views
Chapter 14 Embedded Processing Cores. Overview. RISC : Reduced Instruction Set Computer RISC-based processor : PowerPC, ARM and MIPS The embedded processor can be implemented as a soft , firm or hard core. Potential FPGA Implementation. FPGA Embedded Processor Types.
E N D
Overview • RISC: Reduced Instruction Set Computer • RISC-based processor: PowerPC, ARM and MIPS • The embedded processor can be implemented as a soft, firm or hard core
FPGA Embedded Processor Types • Firm core: Altera’s Nios-II and Xilinx’s MicroBlaze processors • Hard cores: Xilinx’s Virtex-II pro and Virtex-4 405 PowerPC
FPGA Processor Use Considerations • Ability to reuse or port existing baseline code • FPGA-based processor implementation advantages • Most of the system functionalitywithin a single device • Highly-tailored embedded processing solution
System Design Considerations • Use of co-design • Processor architectural implementation • System implementation options • Processor core and peripheral selection
Processor Architecture • RISC-based processor • Processor architecture is a critical factor: determines system performance • Influence system performance optimization include • Processor core implementation • Bus implementation • Architecture • Use of cache • Use of a MMU • Interrupt capability • Software program flow
Processor Core and Peripheral Selection • The processor selection affects all aspects of the system design, budget, and schedule for a project • Processor selection criteria • Performance, architecture • RTOS support • Processor category • Tool features • Technical support • Reference code/examples • Evaluation boards
Hardware Implementation Factors • Tool selection • Design margin • Device optimization • Data flow and FPGA orientation • Debug hooks • System clocking • Bus interconnection and management strategy • Device mapping • IP usage
Software Implementation Factors • Common design terms, Integrated development environment (IDE) • Real-time operation system (RTOS) • Make file: A script file capable of implementing the steps required to automate a sequence of required operations • Linker