Linking the Components

1. 4 Linking the Components

2. The Bus and Word Size • Internal components are: • linked by a bus • designed around a common word size • Word size affects: • processing speed • memory capacity • precision • instruction set size • cost

3. Fig. 4.1a: A machine cycle. The instruction control unit sends a fetch command over the bus to memory.

4. Fig. 4.1b: A machine cycle. Memory responds by copying the contents of the requested memory location onto the bus.

5. Fig. 4.1c: A machine cycle. The instruction moves into the instruction register.

6. Fig. 4.1d: A machine cycle. The arithmetic and logic unit executes the instruction in the instruction register.

7. Fig. 4.1e: A machine cycle. The arithmetic and logic unit fetches the data.

8. Fig. 4.1f: A machine cycle. The data value flows over the bus and into a work register.

9. Fig. 4.2: Microcomputers are constructed around a metal framework called a motherboard.

10. Fig. 4.3: The bus links the processor to a number of slots into which components can be plugged.

11. Fig. 4.4: Memory and peripheral devices are added by plugging a memory board or an interface board into one of the open slots.

12. Fig. 4.5: With single-bus architecture all the components are linked to a common bus.

13. Fig. 4.6: The function of an interface is to translate between internal and external form.

14. Fig. 4.7: Device-independent functions are assigned to a channel and device-dependent functions are assigned to an I/O control unit.

15. Fig. 4.8a: Most mainframes use multiple-bus architecture. The processor starts an I/O operation by sending a signal to the channel.

16. Fig. 4.8b: Most mainframes use multiple-bus architecture. The channel handles the I/O operation and the processor turns to another program.

17. Fig. 4.8c: Most mainframes use multiple-bus architecture. The channel sends an interrupt to the processor to signal the end of the I/O operation.

18. Logical and Physical I/O • Primitive • A physical operation performed by an interface or a peripheral device. • Open • The process of initially establishing a link to a peripheral device.

19. Logical and Physical I/O • Logical I/O • The programmer’s view of I/O. • Physical I/O • The act of physically transferring a unit of data between memory and a peripheral device. • Access Method • A subroutine that performs application-dependent portions of an I/O operation.

20. Fig. 4.9: A programmer’s logical I/O request is converted to the appropriate physical I/O operation by the operating system.

21. Fig. 4.10: On some mainframes, application-dependent portions of the logical-to-physical translation are assigned to access methods.

22. Fig. 4.11: The linkage editor adds the access method to the load module at load time.

23. Fig. 4.12: Converting a logical I/O request to primitive physical commands.

24. Fig. 4.13: A message consists of a header, a body, and a trailer.

25. Networks • Network • two or more computers linked by communication lines • Network types • local area network (LAN) • wide area network (WAN)

26. Fig. 4.14: A bus network.

27. Fig. 4.15: A hierarchical network.

28. Fig. 4.16: A star network.

29. Fig. 4.17: A ring network.

30. Fig. 4.18: A bridge links two or more similar networks. A gateway links dissimilar networks.

31. Network Management • A network operating system helps to manage the system. • each computer is a node • messages routed from node to node • Polling • Collision detection • Token passing