Getting to know our Hamamatsu M64 pmt and Maroc2 chip. January 24, 2008

1. Getting to know our Hamamatsu M64 pmt and Maroc2 chip.January 24, 2008 Matts, Jaro, Leslie • Welcome to Camillo who has just joined us. • All software used written by Jaro. • Bill Sippach constantly in touch.

2. Illuminating WHOLE pmt with LED ~ 25 photo electrons/pixelTrigger on any signal arriving from pmtPulse height in the 64 channels LED light Pmt noise

3. Mask off all BUT channel 22 Some cross talk in surrounding channels To be studied: how much is optical? Electronic ?

4. Trigger on LED firing • To eliminate triggers on pmt noise, trigger on LED firing. • This is done by masking all but the pixel under study ( pixel 52) and pixels 1 and 2. • Requiring light in both pixels 1 and 2 . • Plotting pixel 52 pulse height. (A/)2 = 4 p.e.’s Counts No zero (noise) peak 0 60 120 180 Channel 52 pulse height( ADC counts)

5. Reduce light with filtersHigh voltage: 0.75 kV, Gain ~ 300 000. • Estimate number of p.e.’s by counting “zero”’s. • Count number of zero’s by adding numbers to left of peak and multiplying by 2 : 18 %. • Corresponds to 1.7 p.e. Counts -20 0 40 80 Channel 52 pulse height ( ADC counts)

6. Distribution of channel gains x 10 5 4 3 2 1 Mean = 305 000 = 11 % Gain 0 2 4 6 8 x 105 Gain 1 30 64 Channel number 1) Maximum/minimum variation < 2 (Specs < 4) 2) The gain distribution has a of 11%. 3) Average gain of 305 000 for high voltage of 750 volts.

7. MAROC2 architectureallows gain adjustments • 6 bit gain correction available (0 to 64). • Multiplication factor: 0 to 4. • 16 is equivalent to 1.0 ( no gain correction). Hold signal Multiplexed Analog charge output Variable Slow Shaper 20-100 ns S&H S&H 64 Wilkinson 12 bit ADC Photons Multiplexed Digital charge output 64 inputs Variable Gain Preamp. Bipolar Fast Shaper Photomultiplier 64 channels 64 trigger outputs (to FPGA) 80 MHz encoder Unipolar Fast Shaper Gain correction 64*6bits 3 DACs 12 bits 3 discri thresholds (3*12 bits) LUCID

8. Adjust channel gains with chip gain correction • Around 1.0, the step is 1 out of 16 or ~ 6%. • Aimed for gain of 305 000 and obtained corrected gains. Mean = 308 000  = 6% Gain 1 30 64 Channel number 0 2 4 6 8 x 105 Gain

9. Adjust channel gain to 600 000. Mean = 602 000  = 3% Gain 1 30 64 Channel number 0 2 4 6 8 x 105 Gain

10. Gain vs high voltage

11. Baseline shift • Mask all except pixel 36 • Vary high voltage to change pulse height in channel 36. • Look only at events when LED fires: channel 36 > 100 ADC counts. • Look at channels 1 through 9. They should only see baseline. • Plot average pulse height of 1 to 9 as a function of pulse height in 36. Average baseline In channels 1 though 9 (ADC counts) Definite baseline shift. Depends on channel 36 pulse height. Does NOT depend on input rate (2kHz or 0.5 kHz) Pulse height in channel 36 (ADC counts)

12. Plans for the near future • Study cross talk: build ourselves a well aligned mask. • Study observed baseline shifts as a function of chip occupancy. • Learn how to align cookie on pmt: camera and jig plate available. • Matts is learning how to deal with data files in a Root context. • He and Camillo will work on a Root environment for the analysis of test data. • Jaro is modifying software to read several boards.