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Can we design a core that adapts to the thread-level parallelism in programs?

This paper proposes MorphCore, a core design that adapts to thread-level parallelism in programs, offering high performance and energy efficiency for both single- and multi-threaded programs. The design includes out-of-order and in-order modes, exploiting instruction-level parallelism and thread-level parallelism, respectively. MorphCore outperforms previous proposals, with options for 2- and 4-way SMT large OOO cores, medium OOO cores, small in-order cores, and Core Fusion.

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Can we design a core that adapts to the thread-level parallelism in programs?

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  1. Can we design a core that adaptsto the thread-level parallelism in programs? MorphCore High performance and energy-efficiency on bothsingle- and multi-threaded programs

  2. MorphCore The opposite of previous proposals: A) The base design: OOO core B) Then we add in-order SMT Two modes: out-of-order core Exploits ILP High single-thread performance OutOfOrder highly-threaded in-order SMT core Exploits TLP High multi-thread performance No OOO execution  Energy savings InOrder

  3. By requiring minimal changes to a traditional OOO core • 2- and 4-way SMT large OOO cores • Medium OOO cores • Small in-order cores • And Core Fusion MorphCore outperforms

  4. MorphCore: An Energy-Efficient Architecture for High-Performance ILP and High-Throughput TLP Khubaib M. AaterSulemanMiladHashemi Chris Wilkerson Yale N. Patt The University of Texas at Austin Tuesday at 13:30 in Section 5A “Core Design”

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