Semiconductor Device Modeling and Characterization – EE5342 Lecture 10– Spring 2011

1. Semiconductor Device Modeling and Characterization – EE5342 Lecture 10– Spring 2011 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/

2. First Assignment • e-mail to listserv@listserv.uta.edu • In the body of the message include subscribe EE5342 • This will subscribe you to the EE5342 list. Will receive all EE5342 messages • If you have any questions, send to ronc@uta.edu, with EE5342 in subject line.

3. Second Assignment • Submit a signed copy of the document that is posted at www.uta.edu/ee/COE%20Ethics%20Statement%20Fall%2007.pdf

4. Additional University Closure Means More Schedule Changes • Plan to meet until noon some days in the next few weeks. This way we will make up for the lost time. The first extended class will be Monday, 2/14. • The MT changed to Friday 2/18 • The P1 test changed to Friday 3/11. • The P2 test is still Wednesday 4/13 • The Final is still Wednesday 5/11.

5. MT and P1 Assignment on Friday, 2/18/11 • Quizzes and tests are open book • must have a legally obtained copy-no Xerox copies. • OR one handwritten page of notes. • Calculator allowed. • A cover sheet will be published by Wednesday, 2/16/11.

6. Ideal JunctionTheory Assumptions • Ex = 0 in the chg neutral reg. (CNR) • MB statistics are applicable • Neglect gen/rec in depl reg (DR) • Low level injections apply so that dnp < ppo for -xpc < x < -xp, and dpn < nno for xn < x < xnc • Steady State conditions

7. q(Vbi-Va) Imref, EFn Ec EFN qVa EFP EFi Imref, EFp Ev x -xpc -xp xn xnc 0 Forward Bias Energy Bands

8. Law of the junction(follow the min. carr.)

9. Law of the junction (cont.)

10. Law of the junction (cont.)

11. InjectionConditions

12. Ideal JunctionTheory (cont.) Apply the Continuity Eqn in CNR

13. Ideal JunctionTheory (cont.)

14. Ideal JunctionTheory (cont.)

15. Excess minoritycarrier distr fctn

16. Carrier Injection ln(carrier conc) ln Na ln Nd ln ni ~Va/Vt ~Va/Vt ln ni2/Nd ln ni2/Na x xnc -xpc -xp xn 0

17. Minority carriercurrents

18. Evaluating thediode current

19. Special cases forthe diode current

20. Ideal diodeequation • Assumptions: • low-level injection • Maxwell Boltzman statistics • Depletion approximation • Neglect gen/rec effects in DR • Steady-state solution only • Current dens, Jx = Js expd(Va/Vt) • where expd(x) = [exp(x) -1]

21. Ideal diodeequation (cont.) • Js = Js,p + Js,n = hole curr + ele curr Js,p = qni2Dp coth(Wn/Lp)/(NdLp) = qni2Dp/(NdWn), Wn << Lp, “short” = qni2Dp/(NdLp), Wn >> Lp, “long” Js,n = qni2Dn coth(Wp/Ln)/(NaLn) = qni2Dn/(NaWp), Wp << Ln, “short” = qni2Dn/(NaLn), Wp >> Ln, “long” Js,n << Js,p when Na >> Nd

22. Diffnt’l, one-sided diode conductance ID Static (steady-state) diode I-V characteristic IQ Va VQ

23. Diffnt’l, one-sided diode cond. (cont.)

24. Charge distr in a (1-sided) short diode dpn • Assume Nd << Na • The sinh (see L12) excess minority carrier distribution becomes linear for Wn << Lp • dpn(xn)=pn0expd(Va/Vt) • Total chg = Q’p = Q’p = qdpn(xn)Wn/2 Wn = xnc- xn dpn(xn) Q’p x xn xnc

25. Charge distr in a 1-sided short diode dpn • Assume Quasi-static charge distributions • Q’p = Q’p = qdpn(xn)Wn/2 • ddpn(xn) = (W/2)* {dpn(xn,Va+dV) - dpn(xn,Va)} dpn(xn,Va+dV) dpn(xn,Va) dQ’p Q’p x xnc xn

26. Cap. of a (1-sided) short diode (cont.)

27. General time-constant

28. General time-constant (cont.)

29. General time-constant (cont.)

30. References • *Fundamentals of Semiconductor Theory and Device Physics, by Shyh Wang, Prentice Hall, 1989. • **Semiconductor Physics & Devices, by Donald A. Neamen, 2nd ed., Irwin, Chicago. • M&K = Device Electronics for Integrated Circuits, 3rd ed., by Richard S. Muller, Theodore I. Kamins, and Mansun Chan, John Wiley and Sons, New York, 2003. • 1Device Electronics for Integrated Circuits, 2 ed., by Muller and Kamins, Wiley, New York, 1986. • 2Physics of Semiconductor Devices, by S. M. Sze, Wiley, New York, 1981. • 3 Physics of Semiconductor Devices, Shur, Prentice-Hall, 1990.