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IMPLEMENTATION OF µ - PROCESSOR DATA PATH. Project By: Daniel Brauch Elad Shabtai Barak Schlosser. Project Goals. Designing and implementing the schematic and layout design of an 8 bit µProcessor data path , which will include an ALU Manchester carry look ahead and a barrel shifter.
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IMPLEMENTATION OF µ - PROCESSORDATA PATH Project By: Daniel Brauch Elad Shabtai Barak Schlosser
Project Goals • Designing and implementing the schematic and layout design of an 8 bit µProcessor data path , which will include an ALU Manchester carry look ahead and a barrel shifter. • Testing the design for accuracy and performance.
Applications: • The data path is the core element of every micro processor and thus included in every application that performs arithmetic calculations ,logic evaluation and data movement.
Implementation Notes : • The ALU will be built from a Manchester carry look ahead adder and eight 1 bit ALU. • The output of the ALU will be inserted into the shift register for shifting operations. • The barrel shifter can perform up to 3 bit shifts in a single combinational function. • The inputs for the ALU are valid on the rise of the clock.
Design Specifications: • ALU: • Inputs: two 8-bit words (A,B) 3-bit ALU controls. 3-bit shift controls. 1-bit clock. * Cin bit will be generated from the ALU control bits • Output: 8-bit word (F), 1 carry out. • Functions: A or B, A and B, A xor B, A + B, A – B , B – A , Pass A, Pass B
Design Specifications: • Barrel Shifter: • Can multiply by 1, 2 , 4 or 8 by shifting left 0, 1 ,2 or 3 bits. • General: • Power supply: Vdd is set to 5 volts referenced to ground. • Size specifications: Final physical size must be optimized. • Time specifications: All data andcontrol bits are set on the rise of the clock. The maximum propagation delay for all functions must be less than 100ns.
Manchester Carry explanation • For each bit 2 values are calculated: • Pi = Ai XOR Bi • Gi = Ai AND Bi • On the rise of the clock the upper PMOS gates are closed and the bottom NMOS are open enabling the pull down of the carry out bar. • The Pi controls enables the propagation of the Cout signals. • The max propagation delay is caused by the pulling down of all the carry out bar signals.
Manchester Carry cont. • The main advantage of the Manchester chain is its small physical size. • In terms of propagation delay the Manchester chain is situated in the middle of the scale.
1 bit ALU implementation S2 S1 Cin B A’ B A MUX 4:1 FULL ADDER Out LOGIC S1 S0 A’ 0 0 B’ MUX 4:1 XOR AND OR
ALU control bits 001 : OR 010 : AND 100 : XOR CHAIN XOR - 111 000 : B - A 111 : A - B Equivalence F.A 011 : A + B 110 : PASS A 101 : PASS B
MUX 4:1 implementation A B C D
1 bit FULL ADDER implementation SUM = A xor B xor C C B A ** no need to compute carry out – calculated by Manchester carry look ahead
Tanner S-Edit modules implementation
Simulation results : Carry all: Carry last – worst case propagation ~10ns:
Data Path – modules : Calculate Cin : Define Cin : Shifter : Alu1bit * 8 - 8 bit output : Choose output from Alu / Manchester :
8 bit ALU - module : • Including : • Cin logic • Manchester chain • Alu • Cout logic
8 bit ALU simulation - AND A (10001001) B (10000001) :
DataPath simulation : (A + B) * 4 A=00001010 B=00000011
DataPath simulation : (A + B) * 4 A=00001010 B=00000011
VHDL Simulation
VHDL – simulation resaults: Start – opCode 000 : End – opCode 111 :
Advantages of design : • Parallel implementation of calculations. • Minimal number of transistors in current implementation ~ 600 transistors - Trivial implementation using mux 8*1 with scmos implementation ~ 1300 transistors - Less transistors thus low on power consumption and faster in propagation ~ 40 ns
Milestones • Studying design options for the ALU, Manchester carry look ahead and shifter - Due 01/06/04 • Implementing all 3 units in gate level and testing them for correctness and performance - Due 08/06/04 • Combining units and testing overall design - Due 15/06/04 • Creating VHDL test bench and comparing designs - Due 22/06/04 • Grade : ?