Introduction to Computer Systems

1. Introduction to Computer Systems “The class that bytes” • Topics: • Theme • Four great realities of computer systems (continued)

2. Course Theme • Abstraction is good, but don’t forget reality! • Courses to date emphasize abstraction • Abstract data types • Asymptotic analysis • These abstractions have limits • Especially in the presence of bugs • Need to understand underlying implementations • What did I say about Ali?

3. Course Theme • Useful outcomes • Become more effective programmers • Able to find and eliminate bugs efficiently • Able to tune program performance • Prepare for later “systems” classes in CS • Compilers, Operating Systems, Computer Networks, Computer Architecture

4. Great Reality #3 Memory Matters: Random Access Memory is an un-physical abstraction Memory (RAM) is all the processor knows • It is used to store instructions • It is used to store data Memory is not unbounded • It must be allocated and managed • Many applications are memory dominated Memory referencing bugs especially pernicious • Effects are distant in both time and space Memory performance is not uniform • Cache and virtual memory effects can greatly affect program performance • Adapting program to characteristics of memory system can lead to major speed improvements

5. Memory Referencing Bug Example #include <stdio.h> int main() { double d[1] = {3.14}; int i; long int a[2]; for(i = 0; i < 10; i++) { a[i] = 1073741824; /* Possibly out of bounds */ printf("fun(%d) = %f\n", i, d[0]); } } barr@adar:~/Student/Examples/chap1$ mb fun(0) = 3.140000 fun(1) = 3.140000 fun(1073741824) = 3.140000 drops out of loop because i > 10!

6. Memory Referencing Errors C and C++ do not provide any memory protection • Out of bounds array references • Invalid pointer values • Abuses of malloc/free Can lead to nasty bugs • Whether or not bug has any effect depends on system and compiler • Action at a distance • Corrupted object logically unrelated to one being accessed • Effect of bug may be first observed long after it is generated How can I deal with this? • Program in Java, Python, or C# (but not C++) • Understand what possible interactions may occur • Use or develop tools to detect referencing errors

7. Great Reality #3 (cont) Memory Matters: Memory forms a hierarchy. Smaller memory is faster, larger memory is cheaper. Memory forms a hierarchy • L0: Register file are part of the processor; fastest memory • L1, L2: Cache is small fast memory either on-chip or on separate chip • L3: Main memory is currently RAM • L4: Local disks (HD, CD, etc) • L5: Remote secondary storage (distributed file systems, web servers) Example • Typical disk drive is 100 times larger than RAM • Takes a typical disk drive 10,000,000 times longer to read a word than RAM

8. L1 cache holds cache lines retrieved from the L2 cache. L2 cache holds cache lines retrieved from memory. Main memory holds disk blocks retrieved from local disks. Local disks hold files retrieved from disks on remote network servers. Memory Hierarchy L0: CPU registers hold words retrieved from cache memory. Smaller, faster, and costlier (per byte) storage devices Registers On-chip L1 cache (SRAM) L1: Off-chip L2 cache (SRAM) L2: Main memory (DRAM) L3: Larger, slower, and cheaper (per byte) storage devices Local secondary storage (local disks) L4: Remote secondary storage (distributed file systems, Web servers) L5:

9. Example: cache memory Cache Matters: Small fast memory can make a big BIG difference in performance Processor speed is increasing faster than memory speed • Over the years this gap in speed has increased Cache • As we've seen, larger devices are slower, faster devices expensive Each level stores the most used data from the level below • This type of storage is called a cache for the level below • We can take advantage of this physical reality to make programs faster by an order of magnitude • Chapter 6 discusses this in detail.

10. Cache An L1 cache holds 10's of thousands of bytes and is nearly as fast as a register file An L2 cache holds 100's of thousands to millions of bytes and is connected to the CPU via a special bus Takes 5 times longer to access the L2 cache than L1 cache Takes 5 to 10 times longer to access RAM than the L2 cache CPU chip Register file L1 cache (SRAM) ALU Cache bus System bus Memory bus Main memory (DRAM) L2 cache (SRAM) Bus interface Memory bridge

11. 59,393,288 clock cycles 1,277,877,876 clock cycles (Measured on 2GHz Intel Pentium 4) 21.5 times slower! Memory System Performance Example • Hierarchical memory organization • Performance depends on access patterns • Including how step through multi-dimensional array void copyij(int src[2048][2048], int dst[2048][2048]) { int i,j; for (i = 0; i < 2048; i++) for (j = 0; j < 2048; j++) dst[i][j] = src[i][j]; } void copyji(int src[2048][2048], int dst[2048][2048]) { int i,j; for (j = 0; j < 2048; j++) for (i = 0; i < 2048; i++) dst[i][j] = src[i][j]; }

12. Why The Performance Differs copyij copyji

13. Great Reality #4 • There’s more to performance than asymptotic complexity • Constant factors matter too! • Easily see 10:1 performance range depending on how code written • Must optimize at multiple levels: algorithm, data representations, procedures, and loops

14. Great Reality #4 • There’s more to performance than asymptotic complexity • Must understand system to optimize performance • How programs compiled and executed • How to measure program performance and identify bottlenecks • How to improve performance without destroying code modularity and generality