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ECE 447: Lecture 16

ECE 447: Lecture 16. Common Errors & Good Programming Style. Typical Assembly Language Program Bugs. ECE 447: Typical Assembly Language Program Bugs. 1. Improper transfer to subroutines. Correct: JSR, BSR Incorrect: JMP, BRA. 2. Forgetting to initialize stack pointer.

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ECE 447: Lecture 16

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  1. ECE 447: Lecture 16 Common Errors & Good Programming Style

  2. Typical Assembly Language Program Bugs

  3. ECE 447: Typical Assembly Language Program Bugs 1. Improper transfer to subroutines Correct: JSR, BSR Incorrect: JMP, BRA 2. Forgetting to initialize stack pointer section .bss rmb 128 stack_end done by default by the startup code when you call your assembly language routine from the main() function written in C section .text lds #stack_end-1

  4. ECE 447: Typical Assembly Language Program Bugs 3. Not allocating enough memory for the stack program execution data data stack stack

  5. ECE 447: Typical Assembly Language Program Bugs 4. Unbalanced stack operations immediately after JSR just before RTS SP variables RTN SP RTN

  6. ECE 447: Typical Assembly Language Program Bugs 5. Using subroutines that change registers Example: LDX #ADDRESS JSR changer LDAA 0,X 6. Transposed registers Examples: TBA vs. TAB PSHA PSHB PULX PSHB PSHA PULX instead of

  7. ECE 447: Typical Assembly Language Program Bugs 7. Not initializing pointer register Example: LDAA 0,X 8. Not initializing registers and data areas section .bss var1 rmb 2 Example: section .text LDD var1

  8. ECE 447: Typical Assembly Language Program Bugs 9. Inadvertent modification of the condition code register CLC start LDAA 0,X ADCA 0,Y STAA 0,X INX CPX #end BNE start Examples: CPX #end_address LDD result BNE start modifies Z flag modifies C flag

  9. ECE 447: Typical Assembly Language Program Bugs 10. Using the wrong conditional branch instruction Correct: for unsigned numbers for signed numbers BHI, BHS BLO, BLS BGT, BGE BLT, BLE

  10. ECE 447: Branch Instructions (1) N Z V C – – – – REL after comparison register vs. memory unsigned numbers signed numbers BHI higher > BLO lower < BHS higher or same  BLS lower or same  BGT greater than > BLT less than < BGE greater than or equal  BLE less than or equal  BEQ equal = BNE not equal 

  11. ECE 447: Typical Assembly Language Program Bugs 11. Using the wrong addressing mode Examples: INIT EQU 1 var1 fdb 5 LDD #var1 LDD INIT instead of LDD var1 instead of LDD #INIT

  12. ECE 447: Typical Assembly Language Program Bugs 12. Using a 16-bit counter in memory Example: counter fdb 0,0 inc counter increments only the more significant byte of a 16-bit counter!

  13. Good Programming Style

  14. ECE 447: Do Not Use Magic Constants! Bad style Good style #include <hc11e9.h> #include <hc11e9.h> PIOC |= 0x40; PIOC &= 0xBF; // set EGA PIOC |= EGA; // clear STAI PIOC &= ~STAI;

  15. ECE 447: Do Not Use Magic Constants! Bad style Good style #include <hc11e9.h> #include <hc11e9.h> // do nothing while TOF equal to 0 while ((TFLG2 & TOF) == 0) ; while ((TFLG2 & 0x80)==0) ; or or while (!(TFLG2 & 0x80)) ; while (!(TFLG2 & TOF)) ;

  16. ECE 447: Do Not Use Magic Constants! Bad style Good style PIOC EQU $1002 PIOC_STAI EQU $40 PIOC_EGA EQU $20 // set EGA LDAA PIOC ORAA #EGA STAA PIOC // clear STAI LDAA PIOC ANDA #~STAI STAA PIOC LDAA $1022 ORAA #$02 STAA $1022 LDAA $1022 ANDA #$BF STAA $1022

  17. ECE 447: Initializing global variables Bad practice Good practice int counter; int counter = 0; char lookup[3]; const char lookup[] = {0xE6, 0xE4, 0xEA}; const char string1 = “Menu:”; char string1[5]= {‘M’,’e’,’n’,’u’,’:’}; void main(void) { counter = 0; } main() { lookup[0] = 0xE6; lookup[1] = 0xE4; lookup[2] = 0xEA; }

  18. ECE 447: Clearing Timer Flags Bad Good #include <hc11e9.h> #include <hc11e9.h> TMSK 1 &= ~OC2F; Clears all flags in the same byte except OC2F or TMSK1 |= OC2F Clears all flags in the same byte, including OC2F TMSK1 = OC2F Clears only OC2F

  19. ECE 447: Common errors regarding interrupts C • No __attribute__((interrupt)) in the declaration/prototype • of an interrupt service routine • Using local auto variables to store information • between interrupts • Calling an interrupt service routine in your program • (allowed only for testing after commenting • __attribute__((interrupt)) modifier) ASM • Using RTS instead of RTI

  20. ECE 447: Common errors regarding interrupts C & ASM • No CLI • No setting of the local interrupt enable flag • Waiting for a flag to be set INSIDE of an interrupt

  21. ECE 447: Common errors regarding polling C • Using if instead of while to wait for a flag to be set • No clearing the flag after it was set • No using of special procedure to clear the flag • Not disabling interrupts • Checking the wrong flag

  22. ECE 447: Common errors regarding polling ASM Using too complicated procedure to check the flag Bad style Good style LOOP LDAA PIOC ANDA #STAF CMPA #0 BEQ LOOP LOOP TST PIOC BPL LOOP

  23. ECE 447: Use but not abuse comments Useless and repetitive LDAA #INIT ; load accumulator A with ; the constant INIT STAA COUNTER ; store accumulator A to the variable COUNTER Effective ; initialize COUNTER to INIT LDAA #INIT STAA COUNTER

  24. ECE 448, FPGA and ASIC Design with VHDL Topics VHDL: - writing synthesizable RTL level code in VHDL - writing test benches FPGAs: - architecture of FPGA devices - tools for the computer-aided design with FPGAs - current FPGA families & future trends Applications: - basics of computer arithmetic - applications from communications, cryptography, digital signal processing, bioengineering, etc.

  25. High-level ASIC Design: - standard cell implementation approach - logic synthesis tools - differences between FPGA & standard-cell ASIC design flow Platforms: • FPGA boards • microprocessor board–FPGA board interfaces: • PCI, PCI-X, PCIe, JTAG, USB • reconfigurable computers New trends: • using high-level programming languages to design hardware • microprocessors embedded in FPGAs

  26. Tasks of the course Comprehensive introduction to FPGA & front-end ASIC technology Advanced course on digital system design with VHDL Testing equipment • hardware: • Xilinx FPGAs, • TSMC library • of standard ASIC • cells • software: • VHDL simulators • Synthesis tools • Xilinx ISE • writing VHDL code • for synthesis • design using • finite state machines • and algorithmic state • machines • test benches - oscilloscopes - logic analyzer

  27. Celoxica RC10 Educational Board

  28. Digital system design technologies coverage in the CpE & EE programs at GMU ASICs Microprocessors FPGAs Computer Organization ECE 445 ECE 447 ECE 431 Digital Circuit Design Single Chip Microcomputers ECE 448 FPGA and ASIC Design with VHDL ECE 545 Introductionto VHDL ECE 511ECE 611 ECE 645 Microprocessors Computer Arithmetic Digital Integrated Circuits Advanced Microprocessors ECE 586 ECE 681 VLSI Design Automation

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