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SPICE Simulation of Generalized Return Ratio (GRR ) vs. Loop Gain (LG)

This simulation analyzes the Generalized Return Ratio (GRR) and Loop Gain (LG) of a Trans-Impedance Amplifier (TIA) circuit. The IC1 is set at 1 mA with specific component values. The simulation includes output and input break points, showing the relationship between RRV, RRI, and GRR. It also explores the calculation of loop gain, explaining the product of two voltage gains. A simplified model of a BJT without capacitance is incorporated. The text gives detailed instructions for biasing the circuit, calculating the generalized RR, and breaking the loop open for different drive scenarios. Various probes are used to derive the RR and loop gain values from the simulation. The Nyquist diagram is utilized for further analysis.

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SPICE Simulation of Generalized Return Ratio (GRR ) vs. Loop Gain (LG)

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  1. SPICE Simulation ofGeneralized Return Ratio (GRR)vs. Loop Gain (LG)

  2. Trans-Impedance Amplifier (TIA) IC1 = 1 mA RC = 10 kΩ RF = 20 kΩ β = 200 VA = 1000 V Rμ= 1 MΩ Cπ= 0.3 pF Cμ = 100 fF CCS= 100 pF

  3. GRR Simulation w/ Output Break Point RRV RRI

  4. RRV & RRI w/ Output Break Point

  5. GRR Simulation w/ Input Break Point RRV RRI

  6. RRV & RRI w/ Input Break Point

  7. GRR (RR-1 = RRV-1 + RRI-1)

  8. Loop-Gain Simulation Vtdriving at Input Vtdriving at Output Product of two voltage gains is the loop gain (why?)

  9. GRR vs. LG

  10. Nyquist Diagram

  11. *Generalized Return-Ratio Calculation *Comparison of RR to Loop-Gain Simulation *A simple model of BJT w/o capacitance .MODEL npn NPN +IS=1.0E-16 BF=200 VAF=1000 RB=0 *The basic TIA sub-circuit used in sim. .subckt TIA V1 V2 V3 V4 Q1 V2 V1 GND NPN M=1 Rmu V1 V2 1x Cpi V1 GND 0.3p Cmu V1 V2 100f Ccs V2 GND 100p RC VCC V2 10k RF V3 V4 20k *Bias up the circuit w/ ideal I and bypass C ICC GND VCC 1.005m CCC GND VCC 1 .ends TIA *Calculate the gen. RR *Break loop open at output, voltage drive XOV OV1 OV2 OV1 OV4 TIA LOV OV2 OV4 1e3 COV OV4 OV3 1 VOV OV3 GND AC=1 *Break loop open at output, current drive XOI OI1 OI2 OI1 OI4 TIA COI OI2 GND 1 LOI OI2 OI4 1e3 IOI GND OI4 AC=1 *Break loop open at input, voltage drive XIV IV1 IV2 IV3 IV2 TIA LIV IV1 IV3 1e3 CIV IV1 IV4 1 VIV IV4 GND AC=1 *Break loop open at input, current drive XII II1 II2 II3 II2 TIA LII II1 II3 1e3 CII II3 GND 1 III GND II1 AC=1 *Calculate the loop-gain w/ direct voltage drive XLI LI1 LI2 LI1 LI2 TIA CLI LI3 LI1 1 VLI LI3 GND AC=1 XLO LO1 LO2 LO1 LO2 TIA CLO LO3 LO2 1 VLO LO3 GND AC=1 .op .ac dec 10 1e3 1e12 *Derive RR from the gen. RR's @ output terminal .probe ac RRO=par('(v(OV2)*i(COI))/(v(OV2)+i(COI))') *Derive RR from the gen. RR's @ input terminal .probe ac RRI=par('(v(IV3)*i(CII))/(v(IV3)+i(CII))') *Derive loop-gain by multiplying two gains .probe ac LG=par('v(LI2)*v(LO1)') .option nomodnopagecaptab post acout=0 ingold=2 .temp 25 .end

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