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SOB Silicon-Tungsten ECal -- Test Beam Readiness/Plans

SOB Silicon-Tungsten ECal -- Test Beam Readiness/Plans. Jose’s List Purpose of project (To uncover the origins of EWSB!) Description Status Test beam needs Time scales. Si-W Concept – SiD version. 30 or fewer long. samples. Features Compact (  1 mm gaps)

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SOB Silicon-Tungsten ECal -- Test Beam Readiness/Plans

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  1. SOB Silicon-Tungsten ECal -- Test Beam Readiness/Plans • Jose’s List • Purpose of project • (To uncover the origins of EWSB!) • Description • Status • Test beam needs • Time scales ANL TB R. Frey

  2. Si-W Concept – SiD version 30 or fewer long. samples ANL TB R. Frey

  3. Features • Compact (1 mm gaps) • High segmentation with little penalty • Passive cooling • Full dynamic range charge and good (few ns) timing measurements Si/W (SOB), contd • Technologies to be tested • Dynamically switched Cf • Bump bonding and on-Silicon metallizations • System-level issues – noise, digital pipeline

  4. Si/W Test Beam Goals • The ECal test beam priorities are somewhat different from the HCal • A full optimization of a HCal design will likely require a hadron shower model which agrees with the test beam data. • Much of the ECal design derives from optimization of EM showers in a jet environment. • Expect – at least for front half of ECal – to be able to optimize the design independent of test beam. • First goal for test beam: Test the new technologies. • Integrated electronics and bump bonding (heat, noise, etc). • This does not require a full-depth module. • This does not require a full suite of hadron beams. • Next goal: A full-depth module. (How wide?) • Study full development of hadron showers (global Cal. priority).  i.e. provide an instrumented radiator for the hadron shower studies and MC validation • Optimize back “half” ECal parameters ANL TB R. Frey

  5. Si/W Status and Plans • Note that current design is optimized for warm, but could (we hope!) be optimized for cold • Would require digital pipeline → this is current focus • Would timing still be desirable? • This year (2004) • Qualify prototype detectors already in hand • Fabricate initial RO chip for technical prototype studies • Readout limited fraction of a wafer ($) (64 of 1024 chns.) • Chips probably not in hand before Jan 2005 • 2005 • Electronics evaluations • Bump bonding • “Technical” test beam, summer 2005 at earliest • A few layers with 1st round detectors and chips • Putting in request for beam at SLAC ESA • Plan for a full ECal module (similar to eventual ECal) • Finalize thermal plans, mechanics • Provide correct front radiator for hadron shower validation in test beam. • Earliest beam test of full module: Summer 2006 • Continue to evaluate configuration options • Layering, segmentation ANL TB R. Frey

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