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Mathieu Luisier 1 , Mark Lundstrom 2 , Dimitri Antoniadis 3 , and Jeffrey Bokor 4

Ultimate Device Scaling: Intrinsic Performance Comparisons of Carbon-based, InGaAs, and Si Field-effect Transistors for 5 nm Gate Length. Mathieu Luisier 1 , Mark Lundstrom 2 , Dimitri Antoniadis 3 , and Jeffrey Bokor 4

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Mathieu Luisier 1 , Mark Lundstrom 2 , Dimitri Antoniadis 3 , and Jeffrey Bokor 4

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  1. Ultimate Device Scaling: Intrinsic Performance Comparisons of Carbon-based, InGaAs, and Si Field-effect Transistors for 5 nm Gate Length Mathieu Luisier1, Mark Lundstrom2, Dimitri Antoniadis3, and Jeffrey Bokor4 1ETH Zurich, 2Purdue University, 3MIT, and 4University of California at Berkeley

  2. Outline

  3. Motivation

  4. Motivation: Future of Moore’s Law 65nm (2005) 3-D Si FinFETs for ever? What will be the dominant limiting factors when Lg<10nm? 45nm (2007) 32nm (2009) 22nm (2011) 5nm (2020) Source: Intel Corporation ?? Gate Length Reduction in planar Si MOSFETs: => increase of short-channel effects (SCE) => poor electrostatic control (single-gate) Gate Length Reduction in planar Si MOSFETs: => increase of short-channel effects (SCE) => poor electrostatic control (single-gate) => SOLUTION: 3-D FinFET since 2011

  5. Leakage Sources in Ultrascaled Devices IBT/ S-to-D BTBT1 HIBL BTBT2 Band Diagram of Lg=5nm Nano-transistor

  6. How can we minimize leakage? Best device structure at Lg=5nm: The least sensitive to leakage Solution: Quantum Transport Solver Nanowire Graphene III-V UTB CNT Y.Q. Wu et al., EDL 30, 700 (2009) P. Hashemi et al., EDL 30, 401 (2009) Supratik Guha, IBM Research L. Tapasztó et al., Nat. Nano. 3, 397 (2008) NEEDED:Fast, cheap, and reliable platform to investigate the performance of next-generation ultrascaled nano-transistors beyond 3-D FinFETs

  7. Simulation Approach

  8. State-of-the-art Nano-TCAD Tool Physical Models Simulation Capabilities • Industrial-Strength Nano-electronic Device Simulator • Multi-Geometry Capabilities • Investigate Performance of Ultra-Scaled Nano-Devices before Fabrication • 3D Quantum Transport Solver • Different Flavors of Atomistic Tight-Binding Models • Multi-Physics Modeling: From Ballistic to Dissipative (e-ph) Electron/Hole Transport OMEN More Features Bias • Schrödinger-Poisson Solver with NEGF and WF • Finite Element Poisson • Accelerate Simulation Time through Massive and Multi-Level Parallelization Momentum Energy TB: sp3d5s* Efficient Parallel Computing Space Si Bandstructure Freitag, 22. August 2014 8

  9. Model Verifications BTBT Diode III-V HEMT CNT FET For more information, see presentation 23.7 by Aaron Franklin: “Sub-10 nm Carbon Nanotube Transistor” Expt: J. del Alamo @ MIT Expt: A. Franklin @ IBM YH Expt: S. Rommel @ RIT S. Datta @ PSU NDR Current Zener Current

  10. General Scaling Considerations

  11. Device Characteristics One Single Quantum Transport Solver One Single FEM Poisson Solver SG-AGNR CNT NW DG-UTB DG-AGNR

  12. Id-Vgs at Vds=0.5 V in Carbon Devices AGNR width: 2.1 nm / CNT diameter: 1.49 nm / Band Gap Eg=0.56 eV HfO2 EOT=0.64nm SiO2 EOT=0.64nm HIBL/IBT BTBT • Observations: • same EOT gives very different electrostatic gate-channel coupling • as long as Eg>Vds, BTBT remains weak, but still intra-band tunneling

  13. Intra-Band Tunneling: Electrostatics Spectral current through GAA CNT FETs with d=1.49 nm, Eg=0.563 eV, different dielectrics, and EOT=0.64 nm • Fringing Fields: • stronger when spacer with large εR • effective channel length is longer • same effect as gate underlap doping

  14. Intra-Band Tunneling: Material (1) • OBSERVATIONS: • Current flows through the potential barrier, almost no thermionic component Fix electrostatic potential (Gaussian-like barrier) Investigate how semiconductor properties influence IBT Id=4.4nA Si NW d=3nm Eg=1.404eV Id=91nA • Smaller band gap (and m*) gives higher intra-band tunneling current • Need to understand why CNT d=1nm Eg=0.817eV

  15. Intra-Band Tunneling: Material (2) What is needed: Under-the-Barrier (UB) model Same principle as Top-of-the-Barrier (ToB), but with Complex Bandstructure instead of Real Bandstructure ToB Eg=1.408eV Eg=1.404eV Eg=1.378eV Eg=0.817eV UB Transmission through potential barrier: T(E)=exp(-2*Κ(E)*L)

  16. Ohmic vs Schottky Contacts Id-Vgs transfer characteristics for Si NW and CNT FETs with Ohmic and Schottky Contacts Ohmic Schottky

  17. Performance Comparisons

  18. Id-Vgs at Vds=0.5 V in CNT, NW, and UTB • Features: • CNT with d=0.6nm and Si/InGaAs NW with d=3nm have same band gap: Eg=1.4eV • CNT with d=1nm has band gap: Eg=0.82eV • EOT=0.64nm made of 3.3nm HfO2 • No AGNR since worse than CNT • Intrinsic characteristics VDD=0.5 V • d=1nm GAA-CNT (high IBT) and DG-UTB (bad electrostatics) scale poorly • 3-D devices with same “large” band gap (Eg=1.4 eV) scale better (low IBT) • if CNT with d<1 nm and Eg>1 eV possible, then at least as good as NW • CHALLENGE: trade-off between high injection velocity (low m*) and low SS (high m*) needed, new constraint at short gate lengths

  19. Conclusion

  20. Conclusion and Outlook

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