Does IPM System Matches MICE needs ? Personal Understanding and Remarks

1. Does IPM System Matches MICE needs ?Personal Understanding and Remarks Jean-Sebastien Graulich, Geneva • General Considerations • Front End Boards • Timing Cards and Fan Out • Buffer Cards • Total cost summary • Personal Conclusion Jean-Sébastien Graulich

2. General Considerations • Disclaimer and Acknowledgment: • This is only my personal understanding of the presentations given by Kwame and Rick. Please react if you see mistakes. • This is not a summary of the talks, just a list of things I think it’s important to keep in mind • Many thanks to Kwame and Rick for their pedagogical efforts Jean-Sébastien Graulich

3. Host PC (LabView) “Gate” Data Buffer (2*8 ch) (PCI) Timing card (PCI) Timing fanout QIE cards (16x 8 ch) General Considerations The system is designed for a PC based DAQ The system is not yet fully commissioned 4 different cards are needed Among them 2 are PCI cards for which there is no Linux driver available An outdated driver exists for the Data Buffer cards The Front End Board is the QIE Card. It integrates the charge received on the input over a given time (the sampling period) and transfer it to the Buffer Card in a free running continuous mode. No dead time. Data in coincidence with the “Gate” signal is tagged (one bit in the header) The Buffer Card is also doing Data Sparcification It is possible to store only the data which is tagged as being in coincidence with the “Gate” It has a very large buffer memory (enough to store 400 ms of continuous sampling at 15 MHz) The Timing Card is also doing the Control for the QIE Cards It is doing the initialization of the QIE Card, under request from the PC It provides the sampling clock (here 15 MHz, up to 35 MHz possible) It has two external TTL (Lemo) inputs. The interpretation of the input signals is determined by firmware. They can be used as gate inputs. Input Signal Jean-Sébastien Graulich

4. QIE Cards (FEB) • It requires a custom backplane (call it crate) for power supply (6V and 9V). • Power consumption is substantial: 12 W / board (1 board is 8 ch) • 2 crates are needed for EmCal (16 boards/crate, that is 128 ch/crate) -> ~ 200 W/crate • The input connector is very non-standard • The Input signal is between 1 fC and 16 pC (14 bits) • For EmCal we want flat cable connectors and signal attenuation. Ideally, we would implement there the transformers doing analog splitting with one output going to the QIE and one output coming out to the discriminators. • -> Some redesign has to be foreseen. Not trivial because the card is already crowded. We could go to 9U • Choosing less radiation resistant components could lead to some savings in Cost and Power consumption Jean-Sébastien Graulich

5. Timing Cards • Could/Should be used as it is • Including the LabView User Interface for the Control • Firmware has to be adapted to our trigger scheme • One input signal would be the normal gate. The firmware used for the calibration setup looks similar to what we’ll need. • The second input could be used for measuring the background induced by muon decay (random gate In Spill but out of Burst) without having to readout the tracker. Jean-Sébastien Graulich

6. Timing Fan out Card • Not a mere fan-out • Input an output connectors are not the same (Cat5 input, Cat3/4 output • Could/Should be used as it is • A simpler version can be done for a test if we need only one channel -> Simple connector adapter • Requires power supply too Jean-Sébastien Graulich

7. Buffer Cards • Could/Should be used as it is • One part (Optical Interface) is not available on the market anymore -> Some simple redesign is needed • There is probably no need for new firmware • Requires 64-bit 66MHz PCI • That is a dedicated PC • Not compatible with the VME/PCI32 Interface CAEN V2718! • VME/PCI64 Interface exists. ~ same price but • it’s annoying to have different interfaces. • There is no driver for Linux • -> Large amount of work required to make it compatible with the DDAQ System. Jean-Sébastien Graulich

8. Cost & Work Estimate • There is an oral agreement that Fermilab would endorse the Engineering work involved • I am not able to estimate that workload anyway • Enough QIE chips and GOL chips are available for free • We would have to pay only for the parts and the board production Jean-Sébastien Graulich

9. Conclusion • Main Advantages • No dead time • Precise charge measurement • Main drawbacks • Not a plug-and-play system • Not compatible with the VME/PCI interface I have under my fingers • Not compatible with our specification of Linux PCs -> Large amount of software work required • Cost • Will probably end up around 200 EUR/ch (+ Discri + TDC) • -> No really significant cost saving compared to CAEN QDC proposal BUT • - Less uncertainty (better control of the development and production) • - Fully compliant with the 600 muons per spill (the QDC is NOT) • -> I think this should be tested in BTF -> I’ll try to set it up. • -> My preferred option remains the Flash ADC (if it works). • *Offline* No surprise: The excess in workload is for me and I won’t pay the bill anyway … Jean-Sébastien Graulich