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Understanding NMOS Transistors in Microelectronic Circuit Design

Explore the structure, behavior, and characteristics of NMOS transistors for efficient circuit design. Learn about different bias conditions, C-V characteristics, and operational regions.

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Understanding NMOS Transistors in Microelectronic Circuit Design

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  1. Chapter 4Field-Effect Transistors Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock Microelectronic Circuit Design McGraw-Hill

  2. MOS Capacitor Structure • First electrode- Gate: Consists of low-resistivity material such as metal or polycrystalline silicon • Second electrode- Substrate or Body: n- or p-type semiconductor • Dielectric-Silicon dioxide:stable high-quality electrical insulator between gate and substrate. Microelectronic Circuit Design McGraw-Hill

  3. Substrate Conditions for Different Biases • Accumulation • VG<<VTN • Depletion • VG<VTN • Inversion • VG>VTN Accumulation Depletion Inversion Microelectronic Circuit Design McGraw-Hill

  4. Low-frequency C-V Characteristics for MOS Capacitor on P-type Substrate • MOS capacitance is non-linear function of voltage. • Total capacitance in any region dictated by the separation between capacitor plates. • Total capacitance modeled as series combination of fixed oxide capacitance and voltage-dependent depletion layer capacitance. Microelectronic Circuit Design McGraw-Hill

  5. NMOS Transistor: Structure • 4 device terminals: Gate(G), Drain(D), Source(S) and Body(B). • Source and drain regions form pn junctions with substrate. • vSB, vDSand vGS always positive during normal operation. • vSB always < vDS and vGS to reverse bias pn junctions Microelectronic Circuit Design McGraw-Hill

  6. NMOS Transistor: Qualitative I-V Behavior • VGS<<VTN : Only small leakage current flows. • VGS<VTN: Depletion region formed under gate merges with source and drain depletion regions. No current flows between source and drain. • VGS>VTN: Channel formed between source and drain. If vDS>0,, finite iD flows from drain to source. • iB=0 andiG=0. Microelectronic Circuit Design McGraw-Hill

  7. NMOS Transistor: Triode Region Characteristics for where, Kn= Kn’W/L Kn’=mnCox’’ (A/V2) Cox’’=ox/Tox ox=oxide permittivity (F/cm) Tox=oxide thickness (cm) Microelectronic Circuit Design McGraw-Hill

  8. NMOS Transistor: Triode Region Characteristics (contd.) • Output characteristics appear to be linear. • FET behaves like a gate-source voltage-controlled resistor between source and drain with Microelectronic Circuit Design McGraw-Hill

  9. MOSFET as Voltage-Controlled Resistor Example 1: Voltage-Controlled Attenuator If Kn=500mA/V2, VTN=1V, R=2k and VGG=1.5V, then, To maintain triode region operation, or or Microelectronic Circuit Design McGraw-Hill

  10. MOSFET as Voltage-Controlled Resistor (contd.) Example 2: Voltage-Controlled High-Pass Filter Voltage Transfer function, where, cut-off frequency If Kn=500mA/V2, VTN=1V, C=0.02mF and VGG=1.5V, then, To maintain triode region operation, Microelectronic Circuit Design McGraw-Hill

  11. NMOS Transistor: Saturation Region • If vDS increases above triode region limit, channel region disappears, also said to be pinched-off. • Current saturates at constant value, independent of vDS. • Saturation region operation mostly used for analog amplification. Microelectronic Circuit Design McGraw-Hill

  12. NMOS Transistor: Saturation Region (contd.) for is also called saturation or pinch-off voltage Microelectronic Circuit Design McGraw-Hill

  13. Transconductance of a MOS Device • Transconductance relates the change in drain current to a change in gate-source voltage • Taking the derivative of the expression for the drain current in saturation region, Microelectronic Circuit Design McGraw-Hill

  14. Channel-Length Modulation • As vDS increases abovevDSAT,length of depleted channel beyond pinch-off point, DL, increases and actual L decreases. • iD increases slightly with vDSinstead of being constant. l= channel length modulation parameter Microelectronic Circuit Design McGraw-Hill

  15. Depletion-Mode MOSFETS • NMOS transistors with • Ion implantation process used to form a built-in n-type channel in device to connect source and drain by a resistive channel • Non-zero drain current for vGS=0, negative vGS required to turn device off. Microelectronic Circuit Design McGraw-Hill

  16. Transfer Characteristics of MOSFETS • Plots drain current versus gate-source voltage for a fixed drain-source voltage Microelectronic Circuit Design McGraw-Hill

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