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Industry Trends Compare and Contrast Harry Foster Chief Verification Scientist

Industry Trends Compare and Contrast Harry Foster Chief Verification Scientist. State of the Industry. Statistics. Mindless. There are three types of lies - lies, damn lies, and statistics. -Mark Twain. Myth vs. Reality?. Slowing Adoption of New Technology. 2005 1.72B

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Industry Trends Compare and Contrast Harry Foster Chief Verification Scientist

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  1. Industry TrendsCompare and ContrastHarry FosterChief Verification Scientist

  2. State of the Industry Statistics Mindless There are three types of lies - lies, damn lies, and statistics. -Mark Twain

  3. Myth vs. Reality?

  4. Slowing Adoption of New Technology 2005 1.72B Transistors Dual Core Itanium 2004 592MTransistors Itanium 2 (9MB cache) 2002 220M Transistors Itanium 2 2000 42M Transistors Pentium 4 1999 9.5M+ Transistors Pentium III 1997 7.5m+ Transistors Pentium II 1995 5.5M+Transistors Pentium Pro 1993 3.1M+Transistors Pentium 1989 1,290,000 Transistors 486 1985 275,000 Transistors 386 1982 134,000 Transistors 286 1979 29,000Transistors 8088 2008 2Billion transistors Tukwila Quad Core 4

  5. Frequent Statements About the Slowing of Technology Adoption “The problem is that Moore's Law has collapsed," he says. Coburn asserts that there has been a slowdown in the previously steady move to smaller geometries and larger wafer sizes. Pip Coburn, Coburn Ventures December 15th, 2008 Source: Barron’s “Why it’s going to get a lot worse,” Eric J. Savitz. Dec. 15, 2008 http://online.barrons.com/article/SB122912495865802961.html?mod=gartner “The slowdown in process technology transitions will mean that the semiconductor industry will be driven more by economics than technology …” “You are not seeing these geometries rise and fall off the way they did before. Rather, they are living on.” Len Jelinek, Director and chief analyst, Semiconductor Manufacturing, for iSuppli Source: EE Times,“ISuppli: Gear costs to derail Moore's Law in 2014," Dylan McGrath, June 16, 2009 http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=217900102 “And, the customers have slowed down or delayed their technology transitions either by leveraging their existing installed base or just by delaying their new product introduction for later.” Eric Meurice, Chairman, President and CEO ASML Holding N.V. Source: Q4 2008 Earnings Call. January 15, 2009 http://seekingalpha.com/article/115001-asml-holding-n-v-q4-2008-earnings-call-transcript?page=-1 5 5

  6. Design Completion Trends Source: VLSI Research, Design Completions, September 2008 6 6

  7. Silicon Volume of Wafer Starts(in 300mm Wafer Equivalents) Source: VLSI Research, Silicon Demand, EDA Tech Forum June, 2009 7 7

  8. Reticle Sales Trends Source: VLSI Research, Reticles, September 2008 8 8

  9. Waffer in ProductionIC Fab Capacity by Node * * Note: Realized Source: VLSI Research, December 15, 2008 9 9

  10. Capacity Utilization Improvement Favors 65/45nm Technology Capacity by Node - April Source: Selantek Capacity Analysis, May, 2009, and October 2009 10

  11. 2005 1.72B Transistors Dual Core Itanium 2004 592MTransistors Itanium 2 (9MB cache) 2002 220M Transistors Itanium 2 2000 42M Transistors Pentium 4 1999 9.5M+ Transistors Pentium III 1997 7.5m+ Transistors Pentium II 1995 5.5M+Transistors Pentium Pro 1993 3.1M+Transistors Pentium 1989 1,290,000 Transistors 486 1985 275,000 Transistors 386 1982 134,000 Transistors 286 1979 29,000Transistors 8088 Slowing Adoption of New Technology Adoption of Leading-Edge Semiconductor Technology Is at the Same Rate as in the Past 2008 2Billion transistors Tukwila Quad Core 11

  12. 60% PCs & Cellphones Huge growth in smartphones 2013 1/3 cells a smartphones Communication Computing Digital Video Forecast Consumer Electronics

  13. SoC Designs Dominate

  14. SOC Design & VerificationEmbedded Microprocessor Cores Trend

  15. SOC Design & VerificationEmbedded DSP Cores

  16. 45-nm Wolfdale 65-nm Conroe What Does 45-nm Mean To Us?Challenges and Opportunities • Active and standby leakage accounts for 65% of overall power consumption at 45-nm • Low-power techniques are necessary at 45-nm • 45-nm offers 2X reduction in die size or 2X increase in gate count over 65-nm 300 mm2 45-nm wafer

  17. Myth vs. Reality?Rising Design Costs Will Limit New Applications 17

  18. Transistors Produced per Electrical Engineer Nearly 4-Orders of Magnitude since 1985 Source: Technology Research Group – EDA Database, 1986, EDA TAM, 1989 & Gartner/Dataquest 2005 Seat Count Report, Gary Smith EDA, 2008 Seat Count Analysis VLSI Research, 2008 - Transistors Produced Analysis 18 18

  19. EDA Revenue Is Flat 2% of IC Revenue Source: Mentor Graphics, EDAC MSS & SIA WSTS 19

  20. EDA Cost per Transistor vs Total IC Revenue per Transistor IC Revenue/Transistor ($) Source: SIA, VLSI Research, Federal Reserve Note: EDA Cost Consists of EDA License and Maintenance revenue adjusted for Inflation… 1985 - 2007 20 20

  21. SOC Design Costs Forecasted to Exceed $100 Million Within 3 Years 1 2 Notes: • Total Hardware Engineering Costs + EDA Tool Costs • Total Software Engineering Costs + Electronic Software Design Tool Costs Source: 2007 ITRS Roadmap 21

  22. Software Developers Outnumber Hardware Designers 2-to-1 (in 000’s) Source: VDC - Embedded Systems Market Statistics 2007 22

  23. System Design Has Shifted to the Semiconductor Suppliers Apps Apps Apps Apps Apps Service Abstraction Middleware OS CPU MEM SW Driver SW Driver SW Driver SW Driver HW HW HW HW Buses Much of what was part of the end-system is now incorporated within a System-On-Chip 23

  24. Rising Design Costs Limit New Applications Semiconductor Companies Are Assuming More of the System and Embedded Software Engineering Design Responsibility 24

  25. Myth vs. Reality?Verification Is Keeping Up With Moore’s Law

  26. Size (# transistors) Time (years) An Optimistic View of the Productivity Gap • Let’s assume… • Number of transistor doubles every 18 months (58% / yr) • Amount of logic we can design doubles every 2 years (41% / yr) • Amount of logic we can verify doubles every 2.5 years (25% per year)

  27. DesignGap VerificationGap Ability to Fabricate Ability to Design Design Size in Millions of Gates Ability to Verify Productivity Gap • The Verification Gap • Many companies still using 1990’s verification technologies • Traditional verification techniques can’t keep up * Based on data from the 2003 ITRS, Collett International 2004 FV Survey, and customer surveys 27

  28. The Verification GapDirected TestState-of-the-Art Verification Circa 1990 • Imagine verifying a car using a directed-test approach • Requirement: Fuse will not blow under any normal operation • Scenario 1: accelerate to 37 mph, pop in the new Lady GaGa CD, and turn on the windshield wipers

  29. A Few Weeks Later. . . . . The Verification GapDirected TestState-of-the-Art Verification Circa 1990 • Imagine verifying a car using a directed-test approach • Requirement: Fuse will not blow under any normal operation • Scenario 1: accelerate to 37 mph, pop in the new John Mayer CD, and turn on the windshield wipers 

  30. The Verification GapDirected TestState-of-the-Art Verification Circa 1990 • Imagine verifying a car using a directed-test approach • Requirement: Fuse will not blow under any normal operation • Scenario 714: accelerate to 48 mph, roll down the window, and turn on the left-turn signal

  31. Concurrency Challenge • A purely directed-test methodology does not scale • Imagine writing a directed test for this scenario! • Truly heroic effort—but not practical

  32. Today’s Concurrency Challenge Packet-Based Design TLP Arbiter Tx From Fabric To PHY RetryMemory DLLP Rx From RX

  33. Size (# transistors) Time (years) What Are We Doing To Close The Gap?

  34. 2005 1.72B Transistors Dual Core Itanium 2004 592MTransistors Itanium 2 (9MB cache) 2002 220M Transistors Itanium 2 2000 42M Transistors Pentium 4 1999 9.5M+ Transistors Pentium III 1997 7.5m+ Transistors Pentium II 1995 5.5M+Transistors Pentium Pro 1993 3.1M+Transistors Pentium 1989 1,290,000 Transistors 486 1985 275,000 Transistors 386 1982 134,000 Transistors 286 1979 29,000Transistors 8088 Moore with Less Verification for Every Man, Woman, and Child in India 34

  35. Myth vs. Reality?70% of the project effort is spent in verification….

  36. Design 54% Verification 46% Design 51% Other14% Verification 35% Design Engineers Are Becoming Verification Engineers Source: 2007 Farwest Research IC/ASIC Functional Verification Study, Used with Permission

  37. More and More Verification Cycles

  38. Faster Computers MIPs 38

  39. Lots of Computers AMD Grid AMD Grid Growth 2001-2006 (Relative to 2001 = 1.0) 25 20 15 10 5 0 2001 2002 2003 2004 2005 2006 Source: The AMD Grid: Enabling Grid Computing for the Corporation, August 2006

  40. So, with all this effort, what’s the results?

  41. Designs completed on time according to project's original schedule Results2/3 Projects Miss Schedule Source: 2007 Far West Research and Mentor Graphics

  42. Results77% Respins Due to Functional Bugs Designs Spins First Silicon Success Source: Collett International 2002, 2004, Farwest Research 2007 Functional Verification Study

  43. ResultsTypes of Flaws Source: Collett International 2002, 2004, Farwest Research 2007 Functional Verification Study

  44. ResultsCauses of Functional Flaws Source: 2007 Far West Research and Mentor Graphics

  45. Myth vs. Reality?The industry is evolving its verification capabilities?

  46. DesignGap VerificationGap Ability to Fabricate Ability to Design Design Size in Millions of Gates Ability to Adopt? Ability to Verify Productivity Gap • The Verification Gap • Many companies still using 1990’s verification technologies • Traditional verification techniques can’t keep up * Based on data from the 2003 ITRS, Collett International 2004 FV Survey, and customer surveys 46

  47. Dynamic Techniques Usage Source: 2007 Far West Research and Mentor Graphics

  48. Static Verification Techniques Usage Source: 2007 Far West Research and Mentor Graphics

  49. Stop, time to recap. . . . 49

  50. Recap • Industry fails to mature its processes • Concurrency is difficult to verify • Throw lots of bodies at the problem • Throw lots of computers at it too • All this . . . and poor results

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