Microelectronics 2

1. Electrical Engineering 2 Lecture 8 Microelectronics 2 Dr. Peter Ewen (Room G08, SMC; email - pjse)

2. DIFFUSION CURRENTS Diffusion is the process whereby particles redistribute themselves to even out concentration differences: Water Dye FICK’S 1st LAW • e.g. for electrons: • F – Flow or flux of electrons, i.e. the number crossing unit area in unit time. • De – Diffusivity or diffusion coefficient. • dn – Electron concentration gradient. High  F Concentration, n dx dn negative Low dx x

3. Flow of charge carriers  current Diffusion current densities Einstein relations • Diffusion currents can exist in the absence of an electric field. • Drift and diffusion currents can occur simultaneously.

4. If an electric field and concentration gradient are both present in a sample then the current density will be made up of a drift component and a diffusion component: Drift-diffusion equations Because electrons and holes have a finite lifetime (e, h), they can only diffuse a certain distance (Le, Lh) on average. This is termed the DIFFUSION LENGTH. Diffusion length for electrons Diffusion length for holes

5. Si crystal (ingot) ~1-2 m slice polish 30cm

6. The Czochralski crystal growing technique Fig. 39

7. LECTURE 8 FABRICATION PROCESSES  Wafer production • Epitaxial deposition  Doping by diffusion • Doping by ion implantation • Oxidation • Lithography • Etching

8. Epitaxial growth Fig. 40 Wafers 1000°C

9. The Bipolar Junction Transistor (BJT) base emitter base SiO2 epitaxial n-type layer n emitter p base 10m n collector n-type wafer n+ 200m collector

10. Epitaxial growth Fig. 41 “epitaxial” is from the Greek “epi” = upon and “taxis” = arrangement epitaxial layer Si surface epitaxial layer original surface Si wafer Si atoms As atoms

11. Fig. 42 Diffusion ND > NA – n-type NA > ND – p-type diffused dopant concentration NA>ND ND>NA NA=ND Diffusion of acceptors into an n-type wafer (substrate).

12. Ion Implantation • Key variables: • Dose • Ion energy Fig. 43

13. Fig. 44 • Ion Implantation • Advantages: • Less sideways spreading than for diffusion. • Doping concentration and depth can be precisely controlled. beam current  concentration acceleration voltage  depth • Low temperature process. Diffusion Implantation

15. 1. Junction depth By using multiple As implantations a donor impurity profile, ND(x), is produced which varies approximately with depth, x, from the wafer surface as: ND(x) = Bx-3/2 where the constant B = 5.3x1012 m-3/2. If the implant is made into a uniformly doped p-type wafer with NA = 1.5x1022 m-3, what is the junction depth?

16. 1. Junction depth ND(x) = 5.31012  x-3/2 m-3 NA = 1.51022 m-3 Dopant concentration ND pn junction occurs here at NA = ND NA p-type n-type Depth into wafer / x junction depth Let the junction be at a distance xj from the surface. At junction, ND = NA hence:

17. Oxidation Fig. 45 SiO2 SiO2 Layers: • Used as a mask – impervious to dopant • Protect surface • Insulate – metal interconnects can be run over top • Gate insulator in MOS (Metal Oxide Semiconductor) transistors Si Wafer

18. Dual-Well CMOS metalinterconnects gate oxide gate oxide Al SiO2 TiSi2 tungsten SiO2 p well n well p-epi n+ p+ p-

20. Lithography and etching Mask U.V. light Fig. 46 Resist SiO2 Silicon wafer positive resist (more soluble) negative resist (less soluble)

21. Glass plate photomask Fig. 46(a)

23. Lithography and etching Mask U.V. light Fig. 46 Resist SiO2 Silicon wafer positive resist (more soluble) negative resist (less soluble) Etch SiO2

24. Lithography and etching Mask U.V. light Fig. 46 Resist SiO2 Silicon wafer positive resist (more soluble) negative resist (less soluble) Etch SiO2

26. SUMMARY • FABRICATION PROCESSES • EPITAXIAL DEPOSITION: • Additional Si can be grown on the surface of the wafer by decomposing appropriate gases (e.g. SiH4) over it. • By mixing in gases containing dopant atoms (e.g. PH3, B2H6), n-type or p-type material can be deposited. • The deposited layer is exactly matched to the underlying Si crystal structure.

27. DOPING BY DIFFUSION: Additional dopant can be introduced into the wafer by heating it in a gas containing dopant atoms. For material containing both donors and acceptors: • If NA > ND– material is p-type • If ND > NA– material is n-type • pn junction occurs where NA = ND • DOPING BY IMPLANTATION: Additional dopant can be introduced by exposing wafers to a beam of high energy dopant ions. Advantages: • Precise control of dopant amount and depth • Less sideways spreading • Low temperature process

28. OXIDATION: • Layers of SiO2 can be grown on the wafer surface by heating the wafer to ~1000°C in oxygen or steam. • Uses: • Mask for diffusion or implantation • Protection against damage/contamination • Insulation for interconnects • Gate insulation for MOS transistors

29. LITHOGRAPHY: The circuit pattern is transferred to the surface of the Si using a photographic process involving a light-sensitive coating (photoresist) • Positive resist - exposed regions soluble • Negative resist - unexposed regions soluble • ETCHING: • This is the selective removal of material, particularly SiO2, using liquid etchants (wet etching) or reactive gases (dry etching). • Dry etching is preferred as it is anisotropic.