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Gates – Part 1

Gates – Part 1. drain. drain. drain. no current flows. gate. 3 volts. 0 volts. current flows. source. source. source. Gates are Built With Transistors. nFet. nFetOn. nFetOff. N-type field-effect transistor = nFet. source. source. source. no current flows. gate. 0 volts.

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Gates – Part 1

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  1. Gates – Part 1 Sistem Komputer NAROTAMA

  2. drain drain drain nocurrentflows gate 3 volts 0 volts currentflows source source source Gates are Built With Transistors nFet nFetOn nFetOff N-type field-effect transistor = nFet Sistem Komputer NAROTAMA

  3. source source source nocurrentflows gate 0 volts 3 volts currentflows drain drain drain Gates are Built With Transistors pFet pFetOn pFetOff P-type field-effect transistor = pFet Sistem Komputer NAROTAMA

  4. x x’ Complement Also known as invert or not. This is a schematic symbol. It is a graphical representationof a circuit which implementsthe operation. Sistem Komputer NAROTAMA

  5. FET-Based Inverter Vcc=3V Vcc=3V Vcc=3V off on 3V Vin Vout 3V 0V 0V on off GND=0V GND=0V GND=0V Sistem Komputer NAROTAMA

  6. A Q A B Q B AND and OR Gates Sistem Komputer NAROTAMA

  7. Boolean Expressions and Gates Each Boolean expression has a corresponding realization with logic gates. F = A’ + B C A’ F B C Sistem Komputer NAROTAMA

  8. NAND Gates AND NAND A Q B Q is true iff A AND B are true NAND A Q A B Q B Q is false iff A AND B are true Sistem Komputer NAROTAMA

  9. Vcc Vcc GND GND FET-Based NAND Gate Vcc A B 1 1 1 0 off off off on F 0 1 A 1 1 on on B 1 0 on off GND Sistem Komputer NAROTAMA

  10. NOR Gates OR NOR A Q B Q is true if A OR B is true NOR A Q A B Q B Q is false if A OR B is true Sistem Komputer NAROTAMA

  11. A B F A B FET-Based NOR Gate Can you complete the truth table? Sistem Komputer NAROTAMA

  12. FET-Based Gates • P-type FETs must be on top of gate • N-type FETs must be on bottom of gate • Due to electrical characteristics of the two FET types • Output is driven to either ‘1’ or ‘0’ • never both • never neither Sistem Komputer NAROTAMA

  13. Exclusive-OR (XOR) Output is true iff inputs are different. A Q = A  B = A’B + AB’ B Another definition: C is true if A /= B ECEn/CS 224

  14. Exclusive-OR Theorems The first 4 are important, the others are used less infrequently Sistem Komputer NAROTAMA

  15. Equivalence Operation  denotes equivalence (also written as X==Y) Output is true iff inputs are equal X Q = (X==Y) = X’Y’ + XY  Y Sistem Komputer NAROTAMA

  16. XOR and EQUIV are Complements !! Equivalence – alternate symbol Bubble means NOT Gate often called exclusive NOR or XNOR Sistem Komputer NAROTAMA

  17. Vcc A B C Vcc F A B A F B A C B GND GND Multi-Input Gates   Which one will be slower/faster? Sistem Komputer NAROTAMA

  18. Alternative Gate Symbols The symbolic meaning of the circuit should be clear from what you draw… Sistem Komputer NAROTAMA

  19. Alternative Gate Symbols A A Q Q B B Q is true if A is false OR B is false A Q A B Q B Q is true iff A is false AND B is false Sistem Komputer NAROTAMA

  20. Alternative Gate Symbols Turn on sprinklers if it is not a holiday and it is not a weekend or? The problem statement uses AND, so use the AND symbol Sistem Komputer NAROTAMA

  21. Alternative Gate Symbols Turn off the sprinklers if it is a holiday or it is a weekend or? The problem statement uses OR, so use the OR symbol Sistem Komputer NAROTAMA

  22. Another Example • Design a circuit to determine whether the bits of a 4-bit wire are all zero This is the appropriate symbol to use… Sistem Komputer NAROTAMA

  23. Mixed Symbols • Such a gate doesn’t likely exist • Build from AND gate and inverter • Simplifies schematics • enhanced readability A Q B Q is true iff A is false AND B is true Sistem Komputer NAROTAMA

  24. Single Gate Conversion Rules • Change symbol • AND to OR • OR to AND • Invert all inputs and outputs • No change in behavior – merely a symbol change A A Q Q B B Q is true iff A is false AND B is true Q is false if A is true OR B is false Sistem Komputer NAROTAMA

  25. Alternative Gate Symbols - Summary • Use the symbol that matches the problem statement • Clarity • Documentation • Maintennance • If function is correct but symbol is wrong • your schematic is wrong Sistem Komputer NAROTAMA

  26. Positive vs. Negative Logic Sistem Komputer NAROTAMA

  27. Positive Logic and Negative Logic v1 Logic Gate v2 vout v3 Sistem Komputer NAROTAMA

  28. Positive Logic Let: 0 volts => 0 5 volts => 1 The circuit is a logical AND gate Sistem Komputer NAROTAMA

  29. Negative Logic Let: 0 volts => 1 5 volts => 0 The same circuit is a logical OR gate Sistem Komputer NAROTAMA

  30. Positive/Negative Logic • The most common mapping is:+V  1 0V  0 • Different systems have used different mappings in the past Sistem Komputer NAROTAMA

  31. Multi-Level Logic Sistem Komputer NAROTAMA

  32. Levels of a Network Maximum number of gates between an input and the output 5 Levels • In general: • - the more levels • - the slower the circuit 3 Levels Sistem Komputer NAROTAMA

  33. Number of Levels • Number of levels can be increased by factoring • Number of levels can be decreased by multiplying out G = AB + ACDE + ACF = A(B+CDE+CF) G = A(B+CDE+CF) = AB + ACDE + ACF Sistem Komputer NAROTAMA

  34. Example Levels = 2 #Gates = 4 Delay = tAND4 + tOR3 #Inputs = 12#transistors = 24 Largest gate = 4 inputs G = AB + ACDE + ACF A B Area Calculations: - each input to a gate costs ~2 transistors - area  # of transistors Delay Calculations: - find slowest path from inputs to output tdelay = tAND4 + tOR3 - the 4-input AND is likely slower than the other AND gates A C G D E A C F Sistem Komputer NAROTAMA

  35. factor C D E C G F A B Change the number of levels by factoring G = ACDE + ACF + AB = A(CDE + CF + B) Levels = 3 #Gates = 4 Delay = tAND3 + tOR3 + tAND2 #Inputs = 10#transistors = 20 Largest gate = 3 inputs This is a 3-level circuit… Sistem Komputer NAROTAMA

  36. factor A G B D C E F Factor Again G = A(CDE + CF + B) = A[B+C(F+DE)] Levels = 5 #Gates = 5 Delay = 3 x tAND2 + 2 x tOR2 #Inputs = 10#transistors = 20 Largest gate = 2 inputs This is a 5-level circuit… Sistem Komputer NAROTAMA

  37. Changing the number of levels Three alternative solutions for same function… Each has different area/speed characteristics Sistem Komputer NAROTAMA

  38. Two-Level vs. Multi-Level • In general: • two-level is fastest • multi-level can be smaller • Exploring by hand to find just the right solution can be difficult • We will focus on two-level • easy to get from truth table • minimization techniques in later chapters focus on it Sistem Komputer NAROTAMA

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