Expanded “Cookbook” Instructions for the Teradyne Integra J750 Test System

1. Expanded “Cookbook” Instructions for the Teradyne Integra J750 Test System Team Members Murwan Abdelbasir - EE Jonathan Brown - EE Brent Hewitt-Borde - EE Paul Jennings - EE Robert Stolpman - EE Team May 07-12 Client ECpE Department Faculty Advisor Dr. Weber April 23, 2007

2. Presentation Outline • Project Overview • Introduction • Problem Statement • Operating Environment • Intended Users & Uses • Assumptions & Limitations • End-Product Description • Project Activities • Previous Accomplishments • Technology Considerations • Present Accomplishments • Planned Activities • Resources & Schedule • Estimated Resources • Schedules • Closure Materials • Additional Work • Lessons Learned • Risk & Management • Closing Summary Figure 1. Teradyne Lab Entrance

3. Definitions • ADC - Analog-to-digital converter • ASIO – Analog signal I/O board • DAC – Digital-to-analog converter • DIB – Device interface board • DSIO – Digital signal I/O board • DSP – Digital signal processing • DUT – Device under test • ECpE – Electrical and Computer engineering department • ESD – Electrostatic discharge • GND – Ground • I/O – Input and output • IG-XL – Software used in the code development and testing of each specific DUT • J750 – Teradyne J750 tester used for testing printed circuit boards and integrated circuits • MSO – Mixed signal option • PLCC – Plastic leadless chip carrier • TDR – Time domain reflectometry • TSSOP – Thin shrink small outline package • ZIF – Zero insertion force

4. Project Overview

5. Acknowledgement • Dr. Weber • Dr. Smith • Teradyne Cyclone team • Computer Support Group • Jason Boyd

6. Project Overview • Problem statement • Iowa State recently upgraded the Teradyne J750 with the MSO module to test analog and mixed-signal circuits. • The existing digital cookbook must be upgraded to include mixed-signal testing. • Problem solution • The team will review the existing training materials related to mixed-signal testing. • Test scenario and document support must be created for: • One 10-bit and 12-bit ADC chip • One 10-bit and 12-bit DAC chip • One 10 MHz or greater op-amp chip Figure 2. Teradyne Integra J750

7. Project Overview • Operating Environment • Operates in a controlled laboratory where the temperature range is 27°C to 33°C • Should be protected from ESD • IG-XL software platform is Microsoft Windows XP-based • Intended Users • ECpE faculty and students • Knowledge of Teradyne Integra J750 • Knowledge of mixed-signal testing • Intended Uses • Functional tests on mixed-signal devices • Research • Supplemental lab for the Department of Electrical Engineering’s testing class

8. Project Overview • Assumptions • Operates in a controlled laboratory where the temperature range is 27°C to 33°C with 50% humidity in the room • J750 tester should be protected from ESD • Equipment is operational and properly calibrated • IG-XL software platform has to be Microsoft Windows XP-based • Present IG-XL code can be modified for the required objectives • Limitations • J750 tester is sensitive to temperature fluctuations and must operate within the required temperature range • IG-XL is the only software option • Team does not have full admin rights on the testing computer • Devices and socket converters limit testable frequencies • Teradyne J750 tester cannot be moved

9. Project Overview • End-Product Description • An expanded cookbook outlining each test scenario for the specific DUT • A demo test of the finished 10-bit and 12-bit DAC device using the J750 tester • A built socket converter for the various DUT to interface with the DIB of the J750 tester • Proper documentation of the lab equipment and a quick start guide to proper tester usage

10. Project Activities

11. Project Activities - Present accomplishments • Present Accomplishments • Hardware • IG-XL MSO test lab modules ran for vocoder chip • Knowledge of IG-XL fundamentals • Selection of DIB mating method • Selection and purchase of devices • Full socket converter for ADC and DAC built • Op-amp DIP socket mounted and built • Pin and channel map for all devices completed • New computer motherboard, fully functional • New air conditioning unit installed in the tester room • Software • Identification of major technical challenges • IG-XL worksheets for ADC and DAC created • 10-bit and 12-bit DAC test running • Multiple drafts of cookbook completed • Licensing issues for IG-XL sorted out, functional at present

12. Project Activities - Approach considered and used • Technology considerations • DIB mating • Choice of a new daughter board • Choice of a socket converter • Choice of a printed circuit board • Device selection • Team’s choice of both ADC and DAC chips • Team’s choice of selected op-amp chip Figure 4. TSSOP to DIP socket converter Figure 3. ZIF DIP socket

13. Digital Waveform Analog Waveform DSIOSource ASIO Capture Analog Waveform Digital Waveform DAC ASIOSource DSIOSource ADC “1010” “1010” Project Activities - Definition activities Figure 5. IG-XL design/test definition Slide taken from the training manuals provided by Teradyne to illustrate the concept of MSO testing (24-46)

14. Project Activities - Research activities • Devices to test • Cost, sampling rate, speed • How to implement it? • Teradyne • How do IG-XL templates and test procedures work? • How to create efficient pattern files?

15. Project Activities - Design activities IG-XL Design / Test and Implementation Figure 6. Test procedure flow structure diagram

16. Project Activities - Implementation activities • Implementation Activities • Created ADC and DAC socket converter • Created op-amp DIB • Created IG-XL test template DUT TSSOP socket DIP socket Daughterboard DIB Figure 7. Final DIP to TSSOP converter for ADC and DAC

17. Project Activities - Implementation • Problems encountered • Channel mapping • Proto-area to connector was not one to one • Only DSIO pinouts were available • Only two daughter boards available for testing of devices • Computer downtime • Blown motherboard • IG-XL software licensing issues

18. Project Activities - Testing activities • Test Plan created as shown in design activities on slide 16

19. Project Activities - Testing activities • Sample IG-XL pattern file and test procedure for the 12-bit DAC Figure 8. Pattern file and test procedure for DAC

20. Project Activities - Other activities • Multiple drafts of the cookbook have been completed • Documentation of all events during the course of the project Figure 9. Front cover of cookbook

21. Resources and Schedule

22. Estimated resources - Personnel effort (through April 23) *Mr. Jennings was added to the team in the Spring 2007 semester Figure 10. Personnel effort requirements

23. Estimated resources - Other resources Table 1. Resource requirements w/o labor costs

24. Estimated resources - Financial requirements Table 2. Estimated project costs Table 3. Final revised project costs

25. Schedules Figure 11. Estimated Gantt chart for accomplishments Figure 12. First revision of estimated Gantt chart for accomplishments

26. Schedules (cont’d) Figure 13. Final revised Gantt chart for project

27. Closure Materials

28. Closure materials - Project evaluation Table 4. Project evaluation

29. Closure materials - Commercialization • Limiting factors • Trained test engineers in industry • Low speed • Inflexible test procedures • Cost inefficient for simple devices • IG-XL code development and integration with existing test flow • Possibility for the actual cookbook • Educational/training material • IG-XL customized code templates for a specific DUT

30. Closure materials - Additional work • Converting traditional yearly projects into an ongoing project • Additional sections for testing of various devices on the J750 tester • Lab creation for the high-speed testing and RF classes at Iowa State University • Improve upon existing IG-XL templates and test procedures

31. Closure materials - Lessons learned • What technical knowledge was gained? • Analysis of ADC, DAC and op-amp chip data sheets • Testing methodology and approach • IG-XL software to create test templates for the required DUT devices • MSO implementation • Teradyne Integra J750 usage • What non-technical knowledge was gained? • Communication skills • Project documentation skills • Importance of time management • Vital negotiation skills

32. Closure Materials - Lessons Learned • What went well? • Initial training modules and lab tests • Documentation of important materials • Teradyne J750 tester components are intact • No issues with part selection or purchase • Completed initial test design • Socket converter built for DUT devices • What did not go well? • Inefficient troubleshooting of IG-XL test instance code • No present IG-XL op-amp template • Hardware failure (computer motherboard had to be replaced) • Lack of permissions to install vital software • Licensing issues with the current IG-XL version due to failed motherboard • Inconsistent temperature due a non-functional air conditioning unit

33. Closure Materials - Risk management • Risk: Injury to a team member • Management: Rest of team members focused on more documentation • Risk: Computer hardware failure during testing and development of IG-XL templates • Management: Shifted focus of the project to documentation and the actual creation of the cookbook which could be achieved without the J750 tester • Risk: Problems with proprietary software (IG-XL licensing issues) • Management: Worked with Teradyne and CSG to get a new license file installed and all instances of the IG-XL program to be fully functional • Risk: Inaccurate results from ADC testing • Management: Limit digital noise, proper grounding with bypass capacitors on inputs • Risk: Op-amp instability • Management: Reduction of the resistance value in the resistor, capacitance (RC) setup • Risk: Parts malfunction • Management: Meticulous care in ESD procedures (using ESD bands) • Risk: Facing possible learning and understanding difficulties • Management: Identify each team member’s strengths and assign specific project work based on their strengths

34. Closing Materials - Closing summary • Closing Summary • Mixed-signal option increases the number of avenues for testing devices • Cookbook beneficial to future students and research at Iowa State University • Get more students interested and involved in testing classes and the industry

35. Questions?

36. Thank You