Tile-Based Texture Mapping on Graphics Hardware

1. Tile-Based Texture Mapping on Graphics Hardware Li-Yi Wei NVIDIA

2. Texture Mapping with Large Repetitive Pattern Large terrain textures are very common Games, simulation Issues Bandwidth for texture access Memory/Cache for texture storage Need texture compression

3. Method 1:General Image Compression Implemented in graphics hardware VQ [Beers*96], S3TC/DXT [S3 Corporation] ○ Good for general images × Suboptimal for repetitive patterns image pattern

4. Method 2:Texture Tiling Only works for repetitive patterns ○ Good compression ratio × Requires changing texture coordinates × No native texture filtering support

5. Our Goal: Texture Tiling on GPU ○ No need to change texture coordinates ○Nativetexture filtering ○ Implementation in fragment program

6. tiling Texture Tiling: Simple Case ○ Infinite compression ○ Good for GPU ○Fast decoding ×Repetition Input tile Arbitrarily large output texture

7. tiling Texture Tiling: Wang Tiles Input tiles ○ replace repetition by non-periodic tiling Arbitrarily large output texture

8. tiling How Wang Tile Works 3 4 1 2 Input tiles continuous pattern across identical edge color adjacent tiles share identical edge color

9. Original [Cohen*03] × Sequential tiling × No texture filtering across tiles × Not good for GPU Our approach ○ Random-accessible tiling ○ Native texture filtering across tiles ○ Good for GPU × Need more tiles Wang Tiles for Texture Mapping on GPU ?

10. Overview of Our System Tile hashing Packed input tiles (correct filtering across tiles) Output virtual texture

11. Random Access by Tile Hashing

12. Tile index (Oh, Ov) Hash function H() Edge color ← (Oh, Ov) Cs = H( H(Oh) + Ov) Cn = H( H(Oh) + Ov + 1) Cw = H( Oh+ H(2×Ov) ) Ce = H( Oh + 1 + H(2×Ov) ) ○ Consistency e.g. Ce(1, 2) = Cw(2, 2) ○ Direct evaluation No sequential dependency ○ Easy to compute Ov 4 3 Cn 2 Cw Ce Cs 1 0 Oh 0 1 2 3 4 Random Access by Tile Hashing

13. Tile Hashing Quality • H() simply a permutation table • Hashing quality depends on table size Image size 32 x 32 8 entries 16 entries 32 entries

14. No matching input! Random Access Needs All Possible Tile Edge Colors Input tiles with all edge colors Output virtual texture

15. Shader filtering ○flexible × slow × > 1 texture Boundary padding ○fast ○1 texture × size not in 2n × MIPMAP Tile packing ○fast ○1 texture ○size in 2n ○ MIPMAP × how to pack? How to Filter Tiled Texture ? No good packing (for general case)

16. × tiles with all colors (for random access) ○each tile used once (no wasted memory) ○continuous boundary (native filtering) ○ easy to compute Tile Packing for Texture Filtering Packed input tiles

17. Index(e1,e2) = 0, e1 = e2 = 0; e12 + 2×e2 – 1, e1 > e2 > 0; e22 + 2×e1, e2 > e1≥ 0; (e2 + 1)2 - 2, e1 = e2 > 0; (e1 + 1)2 - 1, e1 > e2 = 0; ○ each tile used once ○ continuous boundary ○ easy to compute Tile Packing in 1D 0 0 1 1 0 2 1 2 2 0 e1 e2

18. as 2 orthogonal 1D packing horizontal: Index(cw,ce) vertical: Index(cs,cn) Index(e1,e2) = 0, e1 = e2 = 0; e12 + 2×e2 – 1, e1 > e2 > 0; e22 + 2×e1, e2 > e1≥ 0; (e2 + 1)2 - 2, e1 = e2 > 0; (e1 + 1)2 - 1, e1 > e2 = 0; cn cw ce cs Tile Packing in 2D

19. Implementation and Performance Implementation Cg without hand optimization Performance (million tri-linear texels per second on Geforce FX 5600) 2.7 – full fragment program implementation 20 – pre-compute tile hashing in a texture

20. Results Input tiles Result with virtual texture size 8192x8192

21. Results Incorrect low-res tile Correct tile edge Input tiles Correct tile edge/corner Traditional texture map

22. Limitations × Incorrect lower-resolution MIPMAP levels × Need tile set with all possible edge colors × Not fast enough

23. Future Work • Performance improvement • Driver implementation • Hash instruction in hardware • 3D texture tile

24. Acknowledgements Wei-Chao Chen Read the 1st paper draft Says I should submit John Danskin Permission to submit Reviewers NVIDIANS

25. Questions?