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CAD Contest Progress – Lab231-Cix

CAD Contest Progress – Lab231-Cix. Member: Chih -Chung, Wan-Chen, Chia -Yao, Sharon Speaker: Chia-Yao Date: 2013/09/02. Outline. Proposed Flow MUX Progress. Proposed Flow. MUX. MUX. MUX. If cut size is larger than the # of SEL bits? Add additional logic gate to fix function

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CAD Contest Progress – Lab231-Cix

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  1. CAD Contest Progress –Lab231-Cix Member: Chih-Chung, Wan-Chen, Chia-Yao, Sharon Speaker: Chia-Yao Date: 2013/09/02

  2. Outline • Proposed Flow • MUX • Progress

  3. Proposed Flow

  4. MUX MUX

  5. MUX • If cut size is larger than the # of SEL bits? • Add additional logic gate to fix function • EX: F = X’Y’ + X’YZ’ + XY’ + WXYZ, but MUX has only 2 SEL bits MUX

  6. MUX

  7. Progress

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